AT90CAN128-16MJ Atmel, AT90CAN128-16MJ Datasheet - Page 35
AT90CAN128-16MJ
Manufacturer Part Number
AT90CAN128-16MJ
Description
IC MCU AVR FLASH 128K 64-QFN
Manufacturer
Atmel
Series
AVR® 90CANr
Specifications of AT90CAN128-16MJ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
For Use With
ATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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4.5.9
7679H–CAN–08/08
Using all 64KB Locations of External Memory
Since the External Memory is mapped after the Internal Memory as shown in
(64K-(“ISRAM size”+256)) bytes of External Memory is available by default (address space
0x0000 to “ISRAM end” is reserved for internal memory). However, it is possible to take advan-
tage of the entire External Memory by masking the higher address bits to zero. This can be done
by using the XMMn bits and control by software the most significant bits of the address. By set-
ting Port C to output 0x00, and releasing the most significant bits for normal Port Pin operation,
the Memory Interface will address 0x0000 - 0x1FFF. See the following code examples.
Note:
Care must be exercised using this option as most of the memory is masked away.
Assembly Code Example
C Code Example
#define OFFSET 0x2000
void XRAM_example(void)
{
unsigned char *p = (unsigned char *) (OFFSET + 1);
DDRC = 0xFF;
PORTC = 0x00;
XMCRB = (1<<XMM1) | (1<<XMM0);
*p = 0xaa;
XMCRB = 0x00;
*p = 0x55;
}
; OFFSET is defined to 0x2000 to ensure
; external memory access
; Configure Port C (address high byte) to
; output 0x00 when the pins are released
; for normal Port Pin operation
ldi
out
ldi
out
; release PC7:5
ldi
sts
; write 0xAA to address 0x0001 of external
; memory
ldi
sts
; re-enable PC7:5 for external memory
ldi
sts
; store 0x55 to address (OFFSET + 1) of
; external memory
ldi
sts
1. The example code assumes that the part specific header file is included.
r16, 0xFF
DDRC, r16
r16, 0x00
PORTC, r16
r16, (1<<XMM1)|(1<<XMM0)
XMCRB, r16
r16, 0xaa
0x0001+OFFSET, r16
r16, (0<<XMM1)|(0<<XMM0)
XMCRB, r16
r16, 0x55
0x0001+OFFSET, r16
(1)
(1)
AT90CAN32/64/128
Figure
4-4, only
35
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