ATTINY26-16PI Atmel, ATTINY26-16PI Datasheet - Page 98

IC AVR MCU 2K 16MHZ IND 20-DIP

ATTINY26-16PI

Manufacturer Part Number
ATTINY26-16PI
Description
IC AVR MCU 2K 16MHZ IND 20-DIP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY26-16PI

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Changing Channel
or Reference
Selection
98
ATtiny26(L)
Figure 54. ADC Timing Diagram, Single Conversion
Figure 55. ADC Timing Diagram, Free Running Conversion
Table 43. ADC Conversion Time
The MUXn and REFS1:0 bits in the ADMUX Register are single buffered through a temporary
register to which the CPU has random access. This ensures that the channels and reference
selection only takes place at a safe point during the conversion. The channel and reference
selection is continuously updated until a conversion is started. Once the conversion starts, the
channel and reference selection is locked to ensure a sufficient sampling time for the ADC. Con-
tinuous updating resumes in the last ADC clock cycle before the conversion completes (ADIF in
ADCSR is set). Note that the conversion starts on the following rising ADC clock edge after
ADSC is written. The user is thus advised not to write new channel or reference selection values
to ADMUX until one ADC clock cycle after ADSC is written.
Condition
Extended conversion
Normal conversions
Cycle Number
ADC Clock
ADSC
ADIF
ADCH
ADCL
Cycle Number
ADC Clock
ADSC
ADIF
ADCH
ADCL
1
Sample & Hold (Cycles from
2
MUX and REFS
Update
Start of Conversion)
Conversion
3
Complete
One Conversion
Sample & Hold
4
11
13.5
1.5
5
12
6
13
7
One Conversion
8
Next Conversion
1
MSB of Result
LSB of Result
9
2
Time (Cycles)
MUX and REFS
Update
10
Conversion
Conversion
Complete
3
11
25
13
12
Sample & Hold
4
13
Conversion
MSB of Result
LSB of Result
Time (µs)
125 - 500
Next Conversion
65 - 260
1
2
MUX and REFS
Update
1477K–AVR–08/10
3

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