UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 497

• Manufacturer Part Number: UPD70F3713GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3713GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(4) Baud rate
(5) Baud rate error
The baud rate is obtained by the following equation.
The baud rate error is obtained by the following equation.
Example
f
k:
Cautions 1. The baud rate error during transmission must be within the error tolerance on the
UCLK
: Frequency of base clock selected by the UAnCTL1.UAnCKS3 to UAnCTL1.UAnCKS0 bits
Value set using the UAnCTL2.UAnBRS7 to UAnCTL2.UAnBRS0 bits (k = 4, 5, 6, ..., 255)
Baud rate =
Error (%) =
2. The baud rate error during reception must satisfy the range indicated in section (7)
Peripheral clock frequency = 20 MHz = 20,000,000 Hz
Setting value of UAnCTL1.UAnCKS3 to UAnCTL1.UAnCKS0 bits = 0000B (f
Setting value of UAnCTL2.UAnBRS7 to UAnCTL2.UAnBRS0 bits = 01000001B (k = 65)
Target baud rate = 153,600
receiving side.
Allowable baud rate range during reception.
Baud rate = 20,000,000/ (2 × 65) = 153,846 [bps]
CHAPTER 12 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
Error = (153,846/153,600 − 1) × 100
Actual baud rate (baud rate with error)
f
2 × k
Target baud rate (correct baud rate)
= 0.160 [%]
UCLK
[bps]
User’s Manual U17716EJ2V0UD
− 1 × 100 [%]
UCLK
= 20,000,000 Hz)
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