UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 271

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UPD70F3713GC-8BS-A

Manufacturer Part Number
UPD70F3713GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet

Specifications of UPD70F3713GC-8BS-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3713GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
7.6.1
TQnCCR0 register if the TQnCTL0.TQnCE bit is set to 1. A PWM waveform with a duty factor of 50% whose half
cycle is equal to the interval can be output from the TOQn0 pin.
TQnCCR1 to TQnCCR3 registers is transferred to the CCR1 to CCR3 buffer registers and, when the count value of
the 16-bit counter matches the value of the CCR1 to CCR3 buffer registers, compare match interrupt request signals
(INTTQnCC1 to INTTQnCC3) are generated. In addition, a PWM waveform with a duty factor of 50%, which is
inverted when the INTTQ0CC1 to INTTQ0CC3 signals are generated, can be output from the TOQ01 to TOQ03 pins.
In the interval timer mode, an interrupt request signal (INTTQnCC0) is generated at the interval set by the
The TQnCCR1 to TQnCCR3 registers are not used in the interval timer mode. However, the set value of the
The value of the TQnCCR1 to TQnCCR3 registers can be rewritten even while the timer is operating.
Interval timer mode (TQnMD2 to TQnMD0 bits = 000)
INTTQnCC0 signal
TQnCCR0 register
Count clock
selection
TOQn0 pin output
Remark
Remark
16-bit counter
TQnCE bit
FFFFH
0000H
n = 0, 1
n = 0, 1
TQnCE bit
Figure 7-9. Basic Timing of Operation in Interval Timer Mode
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
Interval (D
Figure 7-8. Interval Timer Configuration
D
0
User’s Manual U17716EJ2V0UD
0
+ 1) Interval (D
CCR0 buffer register
TQnCCR0 register
16-bit counter
Clear
D
0
Match signal
0
+ 1) Interval (D
D
0
D
0
0
+ 1) Interval (D
controller
Output
INTTQnCC0 signal
D
0
0
+ 1)
TOQn0 pin
269

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