UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 466

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UPD70F3713GC-8BS-A

Manufacturer Part Number
UPD70F3713GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet

Specifications of UPD70F3713GC-8BS-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3713GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
11.7.2 Continuous scan mode/one-shot scan mode operations
ANIn0 pin using the ADTRGn signal as a trigger, and A/D converted continuously. The A/D conversion results are
stored in the ADAnCRm register corresponding to the analog input pin.
(INTADn) is generated. After the end of A/D conversion, the A/D converter waits for a trigger.
464
In this mode, the analog input pins (ANInm) specified by the ADAnS register are selected sequentially from the
When conversion of all the specified analog input pins ends, the A/Dn conversion end interrupt request signal
This is most suitable for applications in which multiple analog inputs are constantly monitored.
Remark
Remark
(1) The ADA0CE bit = 1 (enable)
(2) The external trigger signal (ADTRG0) is generated
(3) The ANI00 pin is A/D converted
(4) The conversion result is stored in the ADA0CR0 register (11) The ADA0M0.ADA0EF bit = 0
(5) The ANI01 pin is A/D converted
(6) The conversion result is stored in the ADA0CR1 register (13) If next trigger is input, return to (3)
(7) The ANI02 pin is A/D converted
Figure 11-21. Example of Scan Mode Operation (Continuous Scan/One-Shot Scan by External Trigger)
Analog Input Pin
ANIn0
ANIn1
ANIn2
ANIn3
n = 0, 1
m = 0 to 3
This is an operation example with the following setting.
ADA0M0.ADA0MD1 and ADA0M0.ADA0MD0 bits = 01 or 11, ADA0M0.ADA0TMD bit = 1,
ADA0M2.ADA0BS bit = 0, ADA0M2.ADA0TMD1 bit = 0,
ADA0S.ADA0S1 and ADA0S.ADA0S0 bits = 11
ADTRG0
ADAnCR0
ADAnCR1
ADAnCR2
ADAnCR3
A/D Conversion Result Register
ANI00
ANI01
ANI02
ANI03
CHAPTER 11 A/D CONVERTERS 0 AND 1
User’s Manual U17716EJ2V0UD
(8) The conversion result is stored in the ADA0CR2 register
(9) The ANI03 pin is A/D converted
(10) The conversion result is stored in the ADA0CR3 register
(12) The INTAD0 interrupt request signal is generated
(14) To end the conversion, the ADA0CE bit = 0 (stop)
A/D converter 0
ADA0CR0
ADA0CR1
ADA0CR2
ADA0CR3

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