UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 121

• Manufacturer Part Number: UPD70F3713GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3713GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

<R>
4.7
4.7.1
(1) External interrupt noise elimination control register (INTPNRC)
(1) Set the registers of a port in the following sequence.
(2) An on-chip pull-up resistor can only be connected when the pins are in input mode in the port mode, or when
Cautions
The INTPNRC register is used to select the sampling clock that is used to eliminate digital noise on the INTP6
pin. If the same level is not detected five times in a row, the signal is eliminated as noise.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Cautions 1. If the input pulse lasts for the duration of 4 to 5 clocks, it is undefined whether the pulse
<1> Set PFCn and PFCEn registers.
<2> Set PMCn register.
<3> Set INTFn and INTRn registers.
If the PFCn register is set before setting the PMCn and PFCEn registers, an unexpected peripheral function
may be selected while the PFCn and PFCEn registers are being set.
the pins function as input pins in the alternate-function mode. Moreover, an on-chip pull-up resistor can be
connected to the TOP21, TOQ1T1 to TOQ1T3, TOQ1B1 to TOQ1B3, TOP31, and TOQH01 to TOQH03
output pins when these pins go into a high-impedance state due to the TOQ1OFF, TOP2OFF, TOP3OFF, or
TOQH0OFF pin or software processing.
Cautions on setting port pins
INTPNRC
2. If noise is generated in synchronization with the sampling clock, eliminate the noise by
3. Noise is not eliminated if the pin is used as a normal input port pin.
After reset: 00H
is detected as a valid edge or eliminated as noise. So that the pulse is actually detected
as a valid edge, the same pulse level must be input for the duration of 5 clocks or more.
attaching a filter to the input pin.
INTPNRC1
0
0
1
1
7
0
INTPNRC0
R/W
0
0
1
0
1
6
CHAPTER 4 PORT FUNCTIONS
User’s Manual U17716EJ2V0UD
Address: FFFFF310H
f
f
f
f
XX
XX
XX
XX
/16
/8
/4
/2
5
0
4
0
Selection of sampling clock
3
0
2
0
INTPNRC1 INTPNRC0
1
0
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