UPD70F3735GC-GAD-AX Renesas Electronics America, UPD70F3735GC-GAD-AX Datasheet - Page 371

no-image

UPD70F3735GC-GAD-AX

Manufacturer Part Number
UPD70F3735GC-GAD-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3735GC-GAD-AX

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
66
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3735GC-GAD-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
V850ES/JF3-L
R01UH0017EJ0400 Rev.4.00
Sep 30, 2010
(1) Operation flow in pulse width measurement mode
<1> Count operation start flow
<2> Count operation stop flow
Figure 8-37. Software Processing Flow in Pulse Width Measurement Mode
INTTQ0CC0 signal
(TQ0CKS0 to TQ0CKS2 bits),
TQ0CCR0 register
TIQ00 pin input
Set TQ0CTL0 register
Register initial setting
16-bit counter
TQ0CTL1 register,
TQ0IOC1 register,
TQ0IOC2 register,
TQ0OPT0 register
TQ0CTL0 register
(TQ0CE bit = 1)
TQ0CE bit = 0
TQ0CE bit
START
FFFFH
STOP
0000H
<1>
0000H
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
Initial setting of these registers
is performed before the
TQ0CE bit is set to 1.
The TQ0CKS0 to TQ0CKS2 bits can
be set when counting starts
(TQ0CE bit = 1).
The counter is initialized and counting
is stopped by clearing the TQ0CE bit to 0.
D
0
D
1
D
<2>
2
0000H
Page 355 of 816

Related parts for UPD70F3735GC-GAD-AX