UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 628
UPD78F0513AGB-GAF-AX
Manufacturer Part Number
UPD78F0513AGB-GAF-AX
Description
MCU 8BIT 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0513AGB-GAF-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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UPD78F0513AGB-GAF-AX
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78K0/Kx2
19.4.2 Division operation
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
• Initial setting
• During operation
• End of operation
• Next operation
1. Set operation data to multiplication/division data register A0 (MDA0L and MDA0H) and multiplication/division data
2. Set bits 0 (DMUSEL0) and 7 (DMUE) of multiplier/divider control register 0 (DMUC0) to 0 and 1, respectively.
3. The operation will be completed when 32 peripheral hardware clocks (f
4. The result data is stored in the MDA0L, MDA0H, and SDR0 registers.
5. DMUE is cleared to 0 (end of operation).
6. After the operation, an interrupt request signal (INTDMU) is generated.
7. To execute multiplication next, start from the initial setting in 19.4.1 Multiplication operation.
8. To execute division next, start from the initial setting in 19.4.2 Division operation.
register B0 (MDB0).
Operation will start.
operation (intermediate data is stored in the MDA0L and MDA0H registers and remainder data register 0 (SDR0)
during operation, and therefore the read values of these registers are not guaranteed).
CHAPTER 19 MULTIPLIER/DIVIDER
PRS
) have been issued after the start of the
628
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