UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 519
UPD78F0513AGB-GAF-AX
Manufacturer Part Number
UPD78F0513AGB-GAF-AX
Description
MCU 8BIT 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0513AGB-GAF-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0513AGB-GAF-AX
Manufacturer:
SEMIKRON
Quantity:
21
Company:
Part Number:
UPD78F0513AGB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 519 of 982
- Download datasheet (7Mb)
78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Address: FF92H
(3) Serial trigger register 0 (CSIT0)
Cautions 1. Even if ATSTP0 or ATSTA0 is set to 1, automatic transfer cannot be started/stopped until 1-byte
Symbol
CSIT0
This is an 8-bit register used to control execution/stop of automatic data transfer between buffer RAM and serial
I/O shift register 0 (SIOA0).
This register can be set by a 1-bit or 8-bit memory manipulation instruction. This register can be set when bit 6
(ATE0) of serial operation mode specification register 0 (CSIMA0) is 1.
Reset signal generation clears this register to 00H.
2. ATSTP0 and ATSTA0 change to 0 automatically after the interrupt signal INTACSI is generated.
3. After automatic data transfer is stopped, the data address when the transfer stopped is stored
transfer is complete.
in automatic data transfer address count register 0 (ADTC0). However, since no function to
restart automatic data transfer is incorporated, when transfer is stopped by setting ATSTP0 = 1,
start automatic data transfer by setting ATSTA0 to 1 after re-setting the registers.
ATSTP0
ATSTA0
After reset: 00H
7
0
0
1
0
1
Automatic data transfer stopped
Automatic data transfer started
Figure 17-4. Format of Serial Trigger Register 0 (CSIT0)
6
0
R/W
5
0
4
0
Automatic data transfer start
Automatic data transfer stop
CHAPTER 17 SERIAL INTERFACE CSIA0
3
0
2
0
ATSTP0
<1>
ATSTA0
<0>
519
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