UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 527

• Manufacturer Part Number: UPD78F0513AGB-GAF-AX
• Description: MCU 8BIT 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AGB-GAF-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
(2) 1-byte transmission/reception communication operation
SIOA0 write
SCKA0
ACSIIF
(a) 1-byte transmission/reception
SOA0
TSF0
SIA0
Caution The SOA0 pin becomes low level by an SIOA0 write.
When bit 7 (CSIAE0) and bit 6 (ATE0) of serial operation mode specification register 0 (CSIMA0) = 1, 0,
respectively, if communication data is written to serial I/O shift register 0 (SIOA0), the data is output via the
SOA0 pin in synchronization with the SCKA0 falling edge, and stored in the SIOA0 register in synchronization
with the rising edge 1 clock later.
Data transmission and data reception can be performed simultaneously.
If only reception is to be performed, communication can only be started by writing a dummy value to the
SIOA0 register.
When communication of 1 byte is complete, an interrupt request signal (INTACSI) is generated.
In 1-byte transmission/reception, the setting of bit 5 (ATM0) of CSIMA0 is invalid.
Be sure to read data after confirming that bit 0 (TSF0) of serial status register 0 (CSIS0) = 0.
1
Figure 17-10. 3-Wire Serial I/O Mode Timing
DO7
DI7
Transfer starts at falling edge of SCKA0
2
DO6
DI6
3
DO5
DI5
4
DO4
DI4
CHAPTER 17 SERIAL INTERFACE CSIA0
5
DO3
DI3
6
DO2
DI2
7
DO1
DI1
End of transfer
8
DI0
DO0
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