UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 247
UPD78F0513AGB-GAF-AX
Manufacturer Part Number
UPD78F0513AGB-GAF-AX
Description
MCU 8BIT 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0513AGB-GAF-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Subsystem clock (f
(when XT1 oscillation
<1> When the power is turned on, an internal reset signal is generated by the power-on-clear (POC) circuit.
Notes 1.
Cautions 1. A voltage oscillation stabilization time of 1.93 to 5.39 ms is required after the supply voltage
<2> When the power supply voltage exceeds 2.7 V (TYP.), the reset is released and the internal high-speed oscillator
<3> After the reset is released and reset processing is performed, the CPU starts operation on the internal high-speed
<4> Set the start of oscillation of the X1 or XT1 clock via software (see (1) in 6.6.1 Example of controlling high-
<5> When switching the CPU clock to the X1 or XT1 clock, wait for the clock oscillation to stabilize, and then set
oscillation clock (f
Internal reset signal
(when X1 oscillation
Internal high-speed
system clock (f
Power supply
voltage (V
selected)
automatically starts oscillation.
oscillation clock.
speed system clock and (1) in 6.6.3 Example of controlling subsystem clock).
switching via software (see (3) in 6.6.1 Example of controlling high-speed system clock and (3) in 6.6.3
Example of controlling subsystem clock).
High-speed
2.
CPU clock
selected)
2. It is not necessary to wait for the oscillation stabilization time when an external clock input from
When releasing a reset (above figure) or releasing STOP mode while the CPU is operating on the internal
high-speed oscillation clock, confirm the oscillation stabilization time for the X1 clock using the oscillation
stabilization time counter status register (OSTC). If the CPU operates on the high-speed system clock (X1
oscillation), set the oscillation stabilization time when releasing STOP mode using the oscillation
stabilization time select register (OSTS).
The 78K0/KB2 is not provided with a subsystem clock.
Note 2
DD
SUB
0 V
RH
XH
Figure 6-16. Clock Generator Operation When Power Supply Voltage Is Turned On
)
)
)
)
reaches 1.59 V (TYP.). If the supply voltage rises from 1.59 V (TYP.) to 2.7 V (TYP.) within 1.93 ms,
the power supply oscillation stabilization time of 0 to 5.39 ms is automatically generated before
reset processing.
the EXCLK and EXCLKS pins is used.
<1>
(When 2.7 V/1.59 V POC Mode Is Set (Option Byte: POCMODE = 1))
Waiting for oscillation accuracy
stabilization (86 to 361 s)
2.7 V (TYP.)
Starting X1 oscillation
is set by software.
<3>
<2>
Starting XT1 oscillation
is set by software.
Reset processing
<4>
(11 to 45 s)
oscillation stabilization time:
Internal high-speed
oscillation clock
2
<4>
11
/f
X
X1 clock
to 2
16
/f
X
Note 1
<5>
CHAPTER 6 CLOCK GENERATOR
High-speed system clock
Switched by
software
<5>
Subsystem clock
247
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