UPD78F0513AGB-GAF-AX Renesas Electronics America, UPD78F0513AGB-GAF-AX Datasheet - Page 488
UPD78F0513AGB-GAF-AX
Manufacturer Part Number
UPD78F0513AGB-GAF-AX
Description
MCU 8BIT 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet
1.UPD78F0500MC-5A4-A.pdf
(982 pages)
Specifications of UPD78F0513AGB-GAF-AX
Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0513AGB-GAF-AX
Manufacturer:
SEMIKRON
Quantity:
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Company:
Part Number:
UPD78F0513AGB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Therefore, the maximum receivable baud rate at the transmission destination is as follows.
Similarly, the maximum permissible data frame length can be calculated as follows.
Therefore, the minimum receivable baud rate at the transmission destination is as follows.
The permissible baud rate error between UART6 and the transmission destination can be calculated from the above
minimum and maximum baud rate expressions, as follows.
Remarks 1. The permissible error of reception depends on the number of bits in one frame, input clock frequency,
10
11
Minimum permissible data frame length: FLmin = 11 × FL −
× FLmax = 11 × FL −
4
8
20
50
100
255
FLmax =
Division Ratio (k)
BRmax = (FLmin/11)
BRmin = (FLmax/11)
2. k: Set value of BRGC6
and division ratio (k). The higher the input clock frequency and the higher the division ratio (k), the
higher the permissible error.
21k – 2
20k
Table 15-6. Maximum/Minimum Permissible Baud Rate Error
FL × 11
k + 2
2 × k
Maximum Permissible Baud Rate Error
−
−
× FL =
1
1
=
=
21k + 2
21k − 2
22k
20k
21k − 2
2 × k
+2.33%
+3.53%
+4.26%
+4.56%
+4.66%
+4.72%
Brate
Brate
FL
k − 2
2k
CHAPTER 15 SERIAL INTERFACE UART6
× FL =
Minimum Permissible Baud Rate Error
21k + 2
2k
FL
−2.44%
−3.61%
−4.31%
−4.58%
−4.67%
−4.73%
488
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