MC56F8366MFVE Freescale Semiconductor, MC56F8366MFVE Datasheet - Page 38

IC DSP 16BIT 60MHZ 144-LQFP

MC56F8366MFVE

Manufacturer Part Number
MC56F8366MFVE
Description
IC DSP 16BIT 60MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8366MFVE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
62
Program Memory Size
544KB (272K x 16)
Program Memory Type
FLASH
Ram Size
18K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part 3 On-Chip Clock Synthesis (OCCS)
3.1 Introduction
Refer to the OCCS chapter of the 56F8300 Peripheral User Manual for a full description of the OCCS.
The material contained here identifies the specific features of the OCCS design.
specific OCCS block diagram to reference in the OCCS chapter in the 56F8300 Peripheral User Manual.
3.2 External Clock Operation
The system clock can be derived from an external crystal, ceramic resonator, or an external system clock
signal. To generate a reference frequency using the internal oscillator, a reference crystal or ceramic
resonator must be connected between the EXTAL and XTAL pins.
3.2.1
The internal oscillator is designed to interface with a parallel-resonant crystal resonator in the frequency
range specified for the external crystal in
in
parameters determine the component values required to provide maximum stability and reliable start-up.
38
Figure
CLKMODE
3-2. Follow the crystal supplier’s recommendations when selecting a crystal, since crystal
Crystal Oscillator
EXTAL
XTAL
Crystal
OSC
÷ (
Prescaler
PLLCID
1,2,4,8
Figure 3-1 OCCS Block Diagram
)
56F8366 Technical Data, Rev. 7
Table
x (1 to 128)
Detector
PLLDB
Lock
PLL
10-15. A recommended crystal oscillator circuit is shown
Reference
Detector
Loss of
Clock
F
OUT
Prescaler CLK
Bus Interface & Control
÷
2
F
OUT/2
PLLCOD
Loss of Reference
÷ (
Postscaler
Clock Interrupt
1,2,4,8
)
LCK
Postscaler CLK
ZSRC
SYS_CLK2
Source to SIM
Figure 3-1
Freescale Semiconductor
Interface
Bus
shows the
Preliminary

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