MC56F8366MFVE Freescale Semiconductor, MC56F8366MFVE Datasheet - Page 130
![IC DSP 16BIT 60MHZ 144-LQFP](/photos/12/43/124333/mc56f8366mfve_sml.jpg)
MC56F8366MFVE
Manufacturer Part Number
MC56F8366MFVE
Description
IC DSP 16BIT 60MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet
1.MC56F8366VFVE.pdf
(182 pages)
Specifications of MC56F8366MFVE
Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
62
Program Memory Size
544KB (272K x 16)
Program Memory Type
FLASH
Ram Size
18K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LQFP
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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6.5.9.14
Each bit controls clocks to the indicated peripheral.
6.5.9.15
Each bit controls clocks to the indicated peripheral.
6.5.9.16
Each bit controls clocks to the indicated peripheral.
6.5.10
The I/O Short Address Location registers are used to specify the memory referenced via the I/O short
address mode. The I/O short address mode allows the instruction to specify the lower six bits of address;
the upper address bits are not directly controllable. This register set allows limited control of the full
address, as shown in
Note:
130
•
•
•
•
•
•
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
I/O Short Address Location Register (SIM_ISALH and SIM_ISALL)
If this register is set to something other than the top of memory (EOnCE register space) and the EX bit
in the OMR is set to 1, the JTAG port cannot access the on-chip EOnCE registers, and debug functions
will be affected.
Serial Peripheral Interface 0 Enable (SPI0)—Bit 2
Pulse Width Modulator B Enable (PWMB)—1
Pulse Width Modulator A Enable (PWMA)—0
Full 24-Bit for Short I/O Address
2 bits from SIM_ISALH Register
16 Bits from SIM_ISALL Register
Figure
Figure 6-14 I/O Short Address Determination
6-14.
6 Bits from I/O Short Address Mode Instruction
56F8366 Technical Data, Rev. 7
“
Hard Coded” Address Portion
Instruction Portion
Freescale Semiconductor
Preliminary
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