HD6473837HV Renesas Electronics America, HD6473837HV Datasheet - Page 73
HD6473837HV
Manufacturer Part Number
HD6473837HV
Description
MCU 3/5V 60K PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet
1.HD6473837HV.pdf
(562 pages)
Specifications of HD6473837HV
Core Processor
H8/300L
Core Size
8-Bit
Speed
5MHz
Connectivity
SCI
Peripherals
LCD, PWM
Number Of I /o
84
Program Memory Size
60KB (60K x 8)
Program Memory Type
OTP
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Example 2: When a BSET instruction is executed on port 3
Here a BSET instruction is executed designating port 3.
P3
signal at P3
example, the BSET instruction is used to change pin P3
[A: Prior to executing BSET]
Input/output
Pin state
PCR3
PDR3
[B: BSET instruction executed]
[C: After executing BSET]
Input/output
Pin state
PCR3
PDR3
[D: Explanation of how BSET operates]
When the BSET instruction is executed, first the CPU reads port 3.
Since P3
to P3
H'80, but the value read by the CPU is H'40.
Next, the CPU sets bit 0 of the read data to 1, changing the PDR3 data to H'41. Finally, the CPU
writes this value (H'41) to PDR3, completing execution of BSET.
56
BSET
7
and P3
0
are output pins, so the CPU reads the value in PDR3. In this example PDR3 has a value of
7
and P3
6
6
are designated as input pins, with a low-level signal input at P3
. The remaining pins, P3
#0
6
P3
Input
Low
level
0
1
P3
Input
Low
level
0
0
are input pins, the CPU reads the pin states (low-level and high-level input). P3
,
7
7
@PDR3
P3
Input
High
level
0
0
P3
Input
High
level
0
1
6
6
5
P3
Output
Low
level
1
0
P3
Output
Low
level
1
0
to P3
The BSET instruction is executed designating port 3.
5
5
0
, are output pins and output low-level signals. In this
P3
Output
Low
level
1
0
P3
Output
Low
level
1
0
4
4
0
to high-level output.
P3
Output
Low
level
1
0
P3
Output
Low
level
1
0
3
3
P3
Output
Low
level
1
0
P3
Output
Low
level
1
0
2
2
7
and a high-level
P3
Output
Low
level
1
0
P3
Output
Low
level
1
0
1
1
P3
Output
Low
level
1
0
P3
Output
High
level
1
1
0
0
5
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