HD6473837HV Renesas Electronics America, HD6473837HV Datasheet - Page 163
HD6473837HV
Manufacturer Part Number
HD6473837HV
Description
MCU 3/5V 60K PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet
1.HD6473837HV.pdf
(562 pages)
Specifications of HD6473837HV
Core Processor
H8/300L
Core Size
8-Bit
Speed
5MHz
Connectivity
SCI
Peripherals
LCD, PWM
Number Of I /o
84
Program Memory Size
60KB (60K x 8)
Program Memory Type
OTP
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
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Manufacturer:
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Port Data Register 3 (PDR3)
PDR3 is an 8-bit register that stores data for port 3 pins P3
bits are set to 1, the values stored in PDR3 are read, regardless of the actual pin states. If port 3 is
read while PCR3 bits are cleared to 0, the pin states are read.
Upon reset, PDR3 is initialized to H'00.
Port Control Register 3 (PCR3)
PCR3 is an 8-bit register for controlling whether each of the port 3 pins P3
input pin or output pin. Setting a PCR3 bit to 1 makes the corresponding pin an output pin, while
clearing the bit to 0 makes the pin an input pin. The settings in PCR3 and in PDR3 are valid only
when the corresponding pin is designated in PMR3 as a general I/O pin.
Upon reset, PCR3 is initialized to H'00.
PCR3 is a write-only register. All bits are read as 1.
Port Pull-Up Control Register 3 (PUCR3)
PUCR3 bits control the on/off state of pin P3
0, setting the corresponding PUCR3 bit to 1 turns on the MOS pull-up for the corresponding pin,
while clearing the bit to 0 turns off the MOS pull-up.
Upon reset, PUCR3 is initialized to H'00.
146
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
PUCR3
PCR3
R/W
R/W
P3
W
7
0
7
0
7
0
7
7
7
PUCR3
PCR3
R/W
R/W
P3
W
6
0
6
0
6
0
6
6
6
PUCR3
PCR3
R/W
R/W
P3
W
5
0
5
0
5
0
5
5
7
–P3
5
PUCR3
PCR3
0
R/W
R/W
P3
MOS pull-ups. When a PCR3 bit is cleared to
W
4
0
4
0
4
0
4
4
4
7
PUCR3
PCR3
to P3
R/W
R/W
P3
W
3
0
3
0
3
0
3
0
3
. If port 3 is read while PCR3
3
PUCR3
PCR3
R/W
R/W
P3
W
2
0
2
0
2
0
2
7
2
to P3
2
PUCR3
PCR3
0
R/W
R/W
P3
W
functions as an
1
0
1
0
1
0
1
1
1
PUCR3
PCR3
R/W
R/W
P3
W
0
0
0
0
0
0
0
0
0
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