HD6473837HV Renesas Electronics America, HD6473837HV Datasheet - Page 232

MCU 3/5V 60K PB-FREE 100-QFP

HD6473837HV

Manufacturer Part Number
HD6473837HV
Description
MCU 3/5V 60K PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD6473837HV

Core Processor
H8/300L
Core Size
8-Bit
Speed
5MHz
Connectivity
SCI
Peripherals
LCD, PWM
Number Of I /o
84
Program Memory Size
60KB (60K x 8)
Program Memory Type
OTP
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Bit 4—Input Capture Interrupt Edge Select (IIEGS): Bit 4 selects the input signal edge at
which input capture interrupts are requested.
Bit 4: IIEGS
0
1
Bits 3, 2—Counter Clear 1, 0 (CCLR1, CCLR0): Bits 3 and 2 designate whether TCG is
cleared at the rising, falling, or both edges of the input capture signal, or is not cleared.
Bit 3: CCLR1
0
1
Bits 1, 0—Clock Select (CKS1, CKS0): Bits 1 and 0 select the clock input to TCG from four
internal clock signals.
Bit 1: CKS1
0
1
9.6.3
The noise canceller circuit built into the H8/3834 Series is a digital low-pass filter that rejects
high-frequency pulse noise in the input at the input capture pin. The noise canceller circuit is
enabled by the noise canceller select (NCS)* bit in port mode register 2 (PMR2).
Figure 9.9 shows a block diagram of the noise canceller circuit.
Noise Canceller Circuit
Description
Interrupts are requested at the rising edge of the input capture signal
Interrupts are requested at the falling edge of the input capture signal
Bit 2: CCLR0
0
1
0
1
Bit 0: CKS0
0
1
0
1
Description
TCG is not cleared
TCG is cleared at the falling edge of the input capture
signal
TCG is cleared at the rising edge of the input capture
signal
TCG is cleared at both edges of the input capture signal
Description
Internal clock: /64
Internal clock: /32
Internal clock: /2
Internal clock:
W
/2
(initial value)
(initial value)
(initial value)
215

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