HD6473837HV Renesas Electronics America, HD6473837HV Datasheet - Page 249

• Manufacturer Part Number: HD6473837HV
• Description: MCU 3/5V 60K PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD6473837HV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: SCI
• Peripherals: LCD, PWM
• Number Of I /o: 84
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: OTP
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Data Transfer Operations
Transmitting: A transmit operation is carried out as follows.
When an internal clock is used, a serial clock is output from pin SCK
transmit data. After data transmission is complete, the serial clock is not output until the next time
the start flag is set to 1. During this time, pin SO
transmitted.
When an external clock is used, data is transmitted in synchronization with the serial clock input at
pin SCK
input; no data is transmitted and the SCSR1 overrun error flag (bit ORER) is set to 1.
While transmission is stopped, the output value of pin SO
SCSR1.
Receiving: A receive operation is carried out as follows.
232
SCK
SO /SI
Set bits SO1 and SCK1 in PMR3 TO 1 so that the respective pins function as SO
necessary, set bit POF1 in port mode register 2 (PMR2) for NMOS open drain output at pin
SO
Clear bit SNC1 in SCR1 to 0, and set bit SNC0 to 1 or 0, designating 8- or 16-bit synchronous
transfer mode. Select the serial clock in bits CKS3 to CKS0. Writing data to SCR1 initializes
the internal state of SCI1.
Write transmit data in SDRL and SDRU, as follows.
Set the SCSR1 start flag (STF) to 1. SCI1 starts operating and outputs transmit data at pin SO
After data transmission is complete, bit IRRS1 in interrupt request register 1 (IRR1) is set to 1.
Set bits SI1 and SCK1 in PMR3 TO 1 so that the respective pins function as SI
Clear bit SNC1 in SCR1 to 0, and set bit SNC0 to 1 or 0, designating 8- or 16-bit synchronous
transfer mode. Select the serial clock in bits CKS3 to CKS0. Writing data to SCR1 initializes
the internal state of SCI1.
Set the SCSR1 start flag (STF) to 1. SCI1 starts operating and receives data at pin SI
After data reception is complete, bit IRRS1 in interrupt request register 1 (IRR1) is set to 1.
1
1
1
8-bit transfer mode: SDRL
16-bit transfer mode: Upper byte in SDRU, lower byte in SDRL
.
1
1
. After data transmission is complete, an overrun occurs if the serial clock continues to be
Bit 0
Bit 1
Figure 10.2 Transfer Format
Bit 2
Bit 3
1
continues to output the value of the last bit
Bit 4
1
Bit 5
can be changed by rewriting bit SOL in
Bit 6
1
in synchronization with the
Bit 7
1
and SCK
1
and SCK
1
.
1
.
1
. If
1
.