HD6473837HV Renesas Electronics America, HD6473837HV Datasheet - Page 211
HD6473837HV
Manufacturer Part Number
HD6473837HV
Description
MCU 3/5V 60K PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet
1.HD6473837HV.pdf
(562 pages)
Specifications of HD6473837HV
Core Processor
H8/300L
Core Size
8-Bit
Speed
5MHz
Connectivity
SCI
Peripherals
LCD, PWM
Number Of I /o
84
Program Memory Size
60KB (60K x 8)
Program Memory Type
OTP
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Manufacturer
Quantity
Price
Company:
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Quantity:
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Company:
Part Number:
HD6473837HV
Manufacturer:
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Quantity:
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Part Number:
HD6473837HV
Manufacturer:
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9.4.4
Table 9.10 summarizes the timer C operation states.
Table 9.10 Timer C Operation States
Operation Mode
TCC Interval
TCC Auto reload Reset Functions Functions Halted
TMC
Note: When
9.5
9.5.1
Timer F is a 16-bit timer with an output compare function. Compare match signals can be used to
reset the counter, request an interrupt, or toggle the output. Timer F can also be used for external
event counting, and can operate as two independent 8-bit timers, timer FH and timer FL.
Features
Features of timer F are given below.
194
Choice of four internal clock sources ( /32, /16, /4, /2) or an external clock (can be used as
an external event counter).
Output from pin TMOFH is toggled by one compare match signal (the initial value of the
toggle output can be set).
Counter can be reset by the compare match signal.
Two interrupt sources: counter overflow and compare match.
Can operate as two independent 8-bit timers (timer FH and timer FL) in 8-bit mode.
internal clock is not synchronous with the system clock, so it is synchronized by a
synchronizing circuit. This may result in a maximum error of 1/ (s) in the count cycle.
* When timer C is operated in subactive mode or subsleep mode, either an external clock
or the
another clock is selected. If the internal
the subclock
least significant bit not being counted.
Timer C Operation States
Timer F
Overview
W
/4 is selected as the internal clock of TCC in active mode or sleep mode, the
W
/4 internal clock must be selected. The counter will not operate in these modes if
Reset Active
Reset Functions Functions Halted
Reset Functions Retained
SUB
, the lower 2 bits of the counter will operate on the same cycle, with the
Sleep
W
Watch
Retained
/4 clock is selected when
Sub-
active
Functions/
Halted*
Functions/
Halted*
Functions
Sub-
sleep
Functions/
Halted*
Functions/
Halted*
Retained
W
/8 is being used as
Standby
Halted
Halted
Retained
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