DF2378RVFQ34V Renesas Electronics America, DF2378RVFQ34V Datasheet - Page 27

IC H8S MCU FLASH 512K 144LQFP

DF2378RVFQ34V

Manufacturer Part Number
DF2378RVFQ34V
Description
IC H8S MCU FLASH 512K 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2378RVFQ34V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2378RVFQ34V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
5.4
5.5
5.6
5.7
Section 6 Bus Controller (BSC).........................................................................137
6.1
6.2
6.3
6.4
5.3.5
5.3.6
5.3.7
Interrupt Sources ................................................................................................................ 120
5.4.1
5.4.2
Interrupt Exception Handling Vector Table....................................................................... 121
Interrupt Control Modes and Interrupt Operation .............................................................. 127
5.6.1
5.6.2
5.6.3
5.6.4
5.6.5
Usage Notes ....................................................................................................................... 134
5.7.1
5.7.2
5.7.3
5.7.4
5.7.5
5.7.6
Features .............................................................................................................................. 137
Input/Output Pins ............................................................................................................... 139
Register Descriptions ......................................................................................................... 142
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
6.3.8
6.3.9
6.3.10 Refresh Control Register (REFCR) ...................................................................... 167
6.3.11 Refresh Timer Counter (RTCNT)......................................................................... 170
6.3.12 Refresh Time Constant Register (RTCOR) .......................................................... 170
Bus Control ........................................................................................................................ 171
6.4.1
IRQ Status Register (ISR)..................................................................................... 116
IRQ Pin Select Register (ITSR) ............................................................................ 117
Software Standby Release IRQ Enable Register (SSIER) .................................... 119
External Interrupts ................................................................................................ 120
Internal Interrupts.................................................................................................. 121
Interrupt Control Mode 0 ...................................................................................... 127
Interrupt Control Mode 2 ...................................................................................... 129
Interrupt Exception Handling Sequence ............................................................... 130
Interrupt Response Times ..................................................................................... 132
DTC and DMAC Activation by Interrupt ............................................................. 133
Conflict between Interrupt Generation and Disabling .......................................... 134
Instructions that Disable Interrupts ....................................................................... 135
Times when Interrupts Are Disabled .................................................................... 135
Interrupts during Execution of EEPMOV Instruction........................................... 135
Change of IRQ Pin Select Register (ITSR) Setting .............................................. 135
IRQ Status Register (ISR)..................................................................................... 136
Bus Width Control Register (ABWCR)................................................................ 143
Access State Control Register (ASTCR) .............................................................. 143
Wait Control Registers AH, AL, BH, and BL
(WTCRAH, WTCRAL, WTCRBH, and WTCRBL)............................................ 144
Read Strobe Timing Control Register (RDNCR) ................................................. 150
CS Assertion Period Control Registers H, L (CSACRH, CSACRL).................... 151
Area 0 Burst ROM Interface Control Register (BROMCRH)
Area 1 Burst ROM Interface Control Register (BROMCRL)............................... 153
Bus Control Register (BCR) ................................................................................. 154
DRAM Control Register (DRAMCR) .................................................................. 156
DRAM Access Control Register (DRACCR) ....................................................... 164
Area Division ........................................................................................................ 171
Rev.7.00 Mar. 18, 2009 page xxv of lxvi
REJ09B0109-0700

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