DF2378RVFQ34V Renesas Electronics America, DF2378RVFQ34V Datasheet - Page 137

• Manufacturer Part Number: DF2378RVFQ34V
• Description: IC H8S MCU FLASH 512K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2378RVFQ34V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 34MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 97
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.9
2.9.1
Bit manipulation instructions such as BSET, BCLR, BNOT, BST, and BIST read data in byte
units, perform bit manipulation, and write data in byte units. Thus, care must be taken when these
bit manipulation instructions are executed for a register or port including write-only bits.
In addition, the BCLR instruction can be used to clear the flag of an internal I/O register. In this
case, if the flag to be cleared has been set by an interrupt processing routine, the flag need not be
read before executing the BCLR instruction.
Notes: 1. From any state except hardware standby mode, a transition to the reset state occurs whenever RES goes low.
2. In every state, when the STBY pin becomes low, the hardware standby mode is entered.
3. For details, refer to section 24, Power-Down Modes.
A transition can also be made to the reset state when the watchdog timer overflows.
Usage Note
Note on Bit Manipulation Instructions
Bus-released state
handling state
Reset state *
Reset state
Exception
RES = High
1
Figure 2.13 State Transitions
External interrupt request
Program execution state
End of bus request
STBY = High,
RES = Low
Bus request
Rev.7.00 Mar. 18, 2009 page 69 of 1136
Hardware standby
Software standby
Power down state *
Sleep mode
mode *
mode
REJ09B0109-0700
2
Section 2 CPU
3