MCF5272VM66J Freescale Semiconductor, MCF5272VM66J Datasheet - Page 402
MCF5272VM66J
Manufacturer Part Number
MCF5272VM66J
Description
IC MCU 166MHZ 196MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Datasheets
1.MCF5272CVF66J.pdf
(544 pages)
2.MCF5272CVF66J.pdf
(12 pages)
3.MCF5272VM66J.pdf
(44 pages)
Specifications of MCF5272VM66J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Processor Series
MCF527x
Core
ColdFire V2
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
I2C, UART, Ethernet, SPI, USB, QSPI
Maximum Clock Frequency
166 MHz
Number Of Timers
4
Operating Supply Voltage
1.4 V to 1.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Quantity
Price
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General Purpose I/O Module
17.2.3
There is no port C control register. Port C is enabled only when the external data bus is 16 bits wide. This
is done by holding QSPI_DOUT/WSEL high during reset. When QSPI_DOUT/WSEL is low during reset,
the external data bus is 32 bits wide and port C is unavailable.
17.2.4
PDCNT, shown in
GPIO capability. Port D has no data register nor data direction register.
Table 17-7
17-8
31–16
15–14
13–12
11–10
Bits
9–8
Reset
Reset
Field
Field
Addr
R/W
R/W
describes PDCNT fields.
Port C Control Register
Port D Control Register (PDCNT)
PDCNT7
PDCNT7
PDCNT6
PDCNT5
PDCNT4
31
15
Name
—
14
Table
MCF5272 ColdFire
Reserved
Configure pin K6.
00 High impedance
01 PWM_OUT2
10 TIN1
11 Reserved
Configure pin P5.
00 High impedance
01 PWM_OUT1
10 TOUT1
11 Reserved
Configure pin P2.
00 High impedance
01 Reserved
10 DIN3
11 INT4
Configure pin K1.
00 High impedance
01 DOUT0
10 URT1_TxD
11 Reserved
PDCNT6
13
17-8, is used to configure pins that have multiple functions but no associated
12
Figure 17-3. Port D Control Register (PDCNT)
Table 17-7. PDCNT Field Descriptions
PDCNT5
11
Table 17-8
®
Integrated Microprocessor User’s Manual, Rev. 3
10
0000_0000_0000_0000
PDCNT4
9
provides the same information organized by function.
MBAR + 0x0098
Read/Write
8
—
—
—
PDCNT3
7
Description
6
PDCNT2
5
4
PDCNT1
3
Freescale Semiconductor
2
PDCNT0
1
16
0
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