MCF5272VM66J Freescale Semiconductor, MCF5272VM66J Datasheet - Page 10

• Manufacturer Part Number: MCF5272VM66J
• Description: IC MCU 166MHZ 196MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VM66J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Processor Series: MCF527x
• Core: ColdFire V2
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, UART, Ethernet, SPI, USB, QSPI
• Maximum Clock Frequency: 166 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 1.4 V to 1.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure
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16-11
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16-16
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16-20
16-21
16-22
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16-27
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16-31
17-1
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17-7
18-1
18-2
18-3
18-4
19-1
20-1
20-2
20-3
x
UART Mode Register 2 (UMR2n) ......................................................................................... 16-6
UART Status Registers (USRn) ............................................................................................ 16-7
UART Clock-Select Registers (UCSRn) ............................................................................... 16-8
UART Command Registers (UCRn) ..................................................................................... 16-9
UART Receiver Buffer (URBn)............................................................................................ 16-10
UART Transmitter Buffers (UTBn) ...................................................................................... 16-11
UART Input Port Change Registers (UIPCRn) ................................................................... 16-11
UART Auxiliary Control Registers (UACRn) ....................................................................... 16-12
UART Interrupt Status/Mask Registers (UISRn/UIMRn)..................................................... 16-13
UART Divider Upper Registers (UDUn) .............................................................................. 16-14
UART Divider Lower Registers (UDLn)............................................................................... 16-14
UART Autobaud Upper Registers (UABUn)........................................................................ 16-14
UART Autobaud Lower Registers (UABLn) ........................................................................ 16-14
UART Transmitter FIFO Registers (UTFn) ......................................................................... 16-15
UART Receiver FIFO Registers (URFn) ............................................................................. 16-16
UART Fractional Precision Divider Control Registers (UFPDn).......................................... 16-17
UART Input Port Registers (UIPn) ...................................................................................... 16-17
UART Output Port Command Registers (UOP1/UOP0) ..................................................... 16-18
UART Block Diagram Showing External and Internal Interface Signals ............................. 16-18
UART/RS-232 Interface ...................................................................................................... 16-19
Clocking Source Diagram ................................................................................................... 16-20
Transmitter and Receiver Functional Diagram.................................................................... 16-22
Transmitter Timing .............................................................................................................. 16-23
Receiver Timing .................................................................................................................. 16-24
Automatic Echo ................................................................................................................... 16-27
Local Loop-Back ................................................................................................................. 16-27
Remote Loop-Back ............................................................................................................. 16-28
Multidrop Mode Timing Diagram ......................................................................................... 16-29
UART Mode Programming Flowchart (Sheet 1 of 5) .......................................................... 16-30
Port A Control Register (PACNT).......................................................................................... 17-3
Port B Control Register (PBCNT).......................................................................................... 17-5
Port D Control Register (PDCNT) ......................................................................................... 17-8
Port A Data Direction Register (PADDR) ............................................................................ 17-10
Port B Data Direction Register (PBDDR) ............................................................................ 17-10
Port C Data Direction Register (PCDDR)............................................................................ 17-11
Port x Data Register (PADAT, PBDAT, and PCDAT) ......................................................... 17-11
PWM Block Diagram (3 Identical Modules)........................................................................... 18-1
PWM Control Registers (PWCRn) ........................................................................................ 18-3
PWM Width Register (PWWDn)............................................................................................ 18-4
PWM Waveform Examples (PWCRn[EN] = 1)...................................................................... 18-4
MCF5272 Block Diagram with Signal Interfaces................................................................... 19-2
Internal Operand Representation.......................................................................................... 20-5
MCF5272 Interface to Various Port Sizes............................................................................. 20-5
Longword Read; EBI = 00; 32-Bit Port; Internal Termination................................................ 20-8
MCF5272 ColdFire
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Integrated Microprocessor User’s Manual, Rev. 3
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Freescale Semiconductor
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