DF2160BVTE10 Renesas Electronics America, DF2160BVTE10 Datasheet - Page 380
![IC H8S MCU FLASH 64K 144TQFP](/photos/28/61/286114/144-tqfp_sml.jpg)
DF2160BVTE10
Manufacturer Part Number
DF2160BVTE10
Description
IC H8S MCU FLASH 64K 144TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2160BVT10V.pdf
(847 pages)
Specifications of DF2160BVTE10
Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2160BVTE10
HD64F2160BVTE10
HD64F2160BVTE10
- Current page: 380 of 847
- Download datasheet (5Mb)
Section 13 Timer Connection
Bit
3
2
1
0
Rev. 3.00 Mar 21, 2006 page 324 of 788
REJ09B0300-0300
Bit Name
HOINV
VOINV
CLOINV
CBOINV
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Output Synchronization Signal Inversion
These bits select inversion of the output phase of the
horizontal synchronization signal (HSYNCO), the
vertical synchronization signal (VSYNCO), the clamp
waveform (CLAMPO), and the blanking waveform
(CBLANK).
0: The IHO signal is used directly as the HSYNCO
1: The IHO signal is inverted before use as the
0: The IVO signal is used directly as the VSYNCO
1: The IVO signal is inverted before use as the
0: The CLO signal (CL1, CL2, CL3, or CL4 signal) is
1: The CLO signal (CL1, CL2, CL3, or CL4 signal) is
0: The CBLANK signal is used directly as the CBLANK
1: The CBLANK signal is inverted before use as the
output
HSYNCO output
output
VSYNCO output
used directly as the CLAMPO output
inverted before use as the CLAMPO output
output
CBLANK output
HOINV:
VOINV:
CLOINV:
CBOINV:
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