DF2160BVTE10 Renesas Electronics America, DF2160BVTE10 Datasheet - Page 119

• Manufacturer Part Number: DF2160BVTE10
• Description: IC H8S MCU FLASH 64K 144TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2160BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 114
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2160BVTE10; HD64F2160BVTE10

3.1
This LSI has three operating modes (modes 1 to 3). The operating mode is determined by the
setting of the mode pins (MD1 and MD0). Table 3.1 shows the MCU operating mode selection.
Table 3.1 lists the MCU operating modes.
Table 3.1
Mode 1 is an expanded mode that allows access to external memory and peripheral devices. With
modes 2 and 3, operation begins in single-chip mode after reset release, but a transition can be
made to external expansion mode by setting the EXPE bit in MDCR to 1.
Mode 0 cannot be used in this LSI. Thus, mode pins should be set to enable mode 1, 2 or 3 in
normal program execution state. Mode pins should not be changed during operation.
3.2
The following registers are related to the operating mode. For details on the bus control register
(BCR), refer to section 6.3.1, Bus Control Register (BCR).
MCU
Operating
Mode
0
1
2
3
Mode control register (MDCR)
System control register (SYSCR)
Serial timer control register (STCR)
MCU Operating Mode Selection
Register Descriptions
MD1
0
1
MCU Operating Mode Selection
MD0
0
1
0
1
Section 3 MCU Operating Modes
CPU
Operating
Mode
—
Normal
Advanced
Normal
Description
—
Expanded mode with on-chip ROM disabled
Expanded mode with on-chip ROM enabled
Single-chip mode
Expanded mode with on-chip ROM enabled
Single-chip mode
Rev. 3.00 Mar 21, 2006 page 63 of 788
Section 3 MCU Operating Modes
REJ09B0300-0300
On-Chip
ROM
—
Disabled
Enabled