DF2160BVTE10 Renesas Electronics America, DF2160BVTE10 Datasheet - Page 29
![IC H8S MCU FLASH 64K 144TQFP](/photos/28/61/286114/144-tqfp_sml.jpg)
DF2160BVTE10
Manufacturer Part Number
DF2160BVTE10
Description
IC H8S MCU FLASH 64K 144TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2160BVT10V.pdf
(847 pages)
Specifications of DF2160BVTE10
Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2160BVTE10
HD64F2160BVTE10
HD64F2160BVTE10
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Section 9 8-Bit PWM Timer (PWM)
9.1
9.2
9.3
9.4
9.5
Section 10 14-Bit PWM Timer (PWMX)
10.1 Features ............................................................................................................................. 243
10.2 Input/Output Pins .............................................................................................................. 244
10.3 Register Descriptions ........................................................................................................ 244
10.4 Bus Master Interface ......................................................................................................... 250
10.5 Operation .......................................................................................................................... 251
10.6 Usage Note........................................................................................................................ 257
Section 11 16-Bit Free-Running Timer (FRT)
11.1 Features ............................................................................................................................. 259
11.2 Input/Output Pins .............................................................................................................. 261
11.3 Register Descriptions ........................................................................................................ 261
11.4 Operation .......................................................................................................................... 271
11.5 Operation Timing.............................................................................................................. 272
Features ............................................................................................................................. 231
Input/Output Pin................................................................................................................ 233
Register Descriptions ........................................................................................................ 233
9.3.1
9.3.2
9.3.3
9.3.4
9.3.5
Operation .......................................................................................................................... 239
Usage Note........................................................................................................................ 241
9.5.1
10.3.1 PWM (D/A) Counters H and L (DACNTH, DACNTL)...................................... 245
10.3.2 PWM (D/A) Data Registers A and B (DADRA, DADRB) ................................. 246
10.3.3 PWM (D/A) Control Register (DACR) ............................................................... 248
10.6.1 Module Stop Mode Setting .................................................................................. 257
11.3.1 Free-Running Counter (FRC) .............................................................................. 262
11.3.2 Output Compare Registers A and B (OCRA, OCRB) ......................................... 262
11.3.3 Input Capture Registers A to D (ICRA to ICRD) ................................................ 262
11.3.4 Output Compare Registers AR and AF (OCRAR, OCRAF) ............................... 263
11.3.5 Output Compare Register DM (OCRDM) ........................................................... 263
11.3.6 Timer Interrupt Enable Register (TIER) .............................................................. 264
11.3.7 Timer Control/Status Register (TCSR) ................................................................ 265
11.3.8 Timer Control Register (TCR) ............................................................................. 268
11.3.9 Timer Output Compare Control Register (TOCR) .............................................. 269
11.4.1 Pulse Output......................................................................................................... 271
PWM Register Select (PWSL)............................................................................. 234
PWM Data Registers (PWDR0 to PWDR15) ...................................................... 236
PWM Data Polarity Registers A and B (PWDPRA, PWDPRB) ......................... 236
PWM Output Enable Registers A and B (PWOERA, PWOERB) ....................... 237
Peripheral Clock Select Register (PCSR) ............................................................ 238
Module Stop Mode Setting .................................................................................. 241
............................................................................. 231
..................................................................... 243
............................................................ 259
Rev. 3.00 Mar 21, 2006 page xxvii of liv
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