DF2160BVTE10 Renesas Electronics America, DF2160BVTE10 Datasheet - Page 10

• Manufacturer Part Number: DF2160BVTE10
• Description: IC H8S MCU FLASH 64K 144TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2160BVTE10

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: Host Interface (LPC), I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 114
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2160BVTE10; HD64F2160BVTE10

Rev. 3.00 Mar 21, 2006 page viii of liv
Item
1.3.1 Pin
Arrangement
Figure 1.3 Pin
Arrangement of
H8S/2140B,
H8S/2141B,
H8S/2145B, and
H8S/2148B
1.3.2 Pin Functions in
Each Operating Mode
Table 1.1 Pin
Functions of
H8S/2140B,
H8S/2141B,
H8S/2145B, and
H8S/2148B in Each
Operating Mode
2.4.4 Condition-Code
Register (CCR)
2.6.1 Table of
Instructions Classified
by Function
Table 2.7 Bit
Manipulation
Instructions (1)
2.7.5 Absolute
Address—@aa:8,
@aa:16, @aa:24, or
@aa:32
Page
5
11
36
46
53
Revision (See Manual for Details)
Note amended
Note: * The LPC function and the WUE pin function are not
supported by the H8S/2148B and H8S/2145B (5-V version).
Note * amended
Note: * The LPC function and the WUE pin function are not
supported by the H8S/2148B and H8S/2145B (5-V version).
Table amended
Interrupt Mask Bit
Masks interrupts when set to 1. NMI is accepted …
Table amended
Description amended
… absolute address, the upper 24 bits are all assumed …
Instruction Size *
BIAND
BIOR
B
B
Function
C
Logically ANDs the carry flag with the inverse of a specified bit in a
general register or memory operand and stores the result in the carry
flag.
The bit number is specified by 3-bit immediate data.
C
Logically ORs the carry flag with the inverse of a specified bit in a
general register or memory operand and stores the result in the carry
flag.
The bit number is specified by 3-bit immediate data.
[~(<bit-No.> of <EAd>)]
[ <bit-No.> of <EAd>)]
C
C