MC9S12XDP512CAG Freescale Semiconductor, MC9S12XDP512CAG Datasheet - Page 141

IC MCU 512K FLASH 144-LQFP

MC9S12XDP512CAG

Manufacturer Part Number
MC9S12XDP512CAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDP512CAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (24-ch x 10-bit)
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
119
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
For Use With
DEMO9S12XDT512E - BOARD DEMO FOR MC9S12XDT512EVB9S12XDP512E - BOARD DEMO FOR MC9S12XDP512
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Freescale Semiconductor
C[D:A}
Field
3:0
SRES8
Analog Input Channel Select Code — These bits select the analog input channel(s) whose signals are
sampled and converted to digital codes.
channels.
In the case of single channel conversions (MULT = 0), this selection code specified the channel to be examined.
In the case of multiple channel conversions (MULT = 1), this selection code represents the first channel to be
examined in the conversion sequence. Subsequent channels are determined by incrementing the channel
selection code or wrapping around to AN0 (after converting the channel defined by the Wrap Around Channel
Select Bits WRAP[3:0] in ATDCTL0). In case starting with a channel number higher than the one defined by
WRAP[3:0] the first wrap around will be AN15 to AN0.
1
1
1
0
0
0
V
RH
V
Input Signal
5.120 Volts
RL
Table 4-16. Left Justified, Signed and Unsigned ATD Output Codes.
= 5.12 Volts
5.100
5.080
2.580
2.560
2.540
0.020
0.000
= 0 Volts
Table 4-14. ATDCTL5 Field Descriptions (continued)
DJM
0
0
1
0
0
1
Table 4-15. Available Result Data Formats.
MC9S12XDP512 Data Sheet, Rev. 2.21
8-Bit Codes
Signed
DSGN
7F
7F
7E
FF
01
00
81
80
X
X
0
1
0
1
Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description
Table 4-17
Description
8-Bit Codes
Unsigned
lists the coding used to select the various analog input
10-bit / left justified / unsigned — bits 15:6
10-bit / right justified / unsigned — bits 9:0
8-bit / right justified / unsigned — bits 7:0
8-bit / left justified / unsigned — bits 15:8
10-bit / left justified / signed -— bits 15:6
FE
FF
FF
7F
81
80
01
00
8-bit / left justified / signed — bits 15:8
Description and Bus Bit Mapping
Result Data Formats
10-Bit Codes
Signed
7FC0
7F00
7E00
FF00
0100
0000
8100
8000
10-Bit Codes
Unsigned
FFC0
FE00
FF00
7F00
8100
8000
0100
0000
141

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