MC9S12XDP512CAG Freescale Semiconductor, MC9S12XDP512CAG Datasheet - Page 1330

• Manufacturer Part Number: MC9S12XDP512CAG
• Description: IC MCU 512K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDP512CAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 32 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 119
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (24-ch x 10-bit)
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• For Use With: DEMO9S12XDT512E - BOARD DEMO FOR MC9S12XDT512EVB9S12XDP512E - BOARD DEMO FOR MC9S12XDP512
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Appendix G Detailed Register Map
0x0180–0x01BF Freescale Scalable CAN — MSCAN (CAN1) Map (Sheet 3 of 3)
0x01C0–0x01FF Freescale Scalable CAN — MSCAN (CAN2) Map
1332
Address
Address
0x01A0–
0x01B0–
0x01CC
0x01CD
0x01AF
0x01BF
0x01C0
0x01C1
0x01C2
0x01C3
0x01C4
0x01C5
0x01C6
0x01C7
0x01C8
0x01C9
0x01CA
0x01CB
0x01CE CAN2RXERR
0x01CF CAN2TXERR
0x01D0
0x019F
CAN1IDMR7
CAN2TBSEL
CAN2IDAR0
CAN1RXFG
CAN1TXFG
CAN2BTR0
CAN2BTR1
CAN2RFLG
CAN2TFLG
CAN2TARQ
CAN2CTL0
CAN2CTL1
CAN2TAAK
CAN2MISC
CAN2RIER
CAN2IDAC
CAN2TIER
Reserved
Name
Name
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R RXERR7
R TXERR7
R
RXFRM
WUPIF
WUPIE
SAMP
CANE
SJW1
Bit 7
Bit 7
AM7
AC7
0
0
0
0
0
0
0
0
(See
(See
CLKSRC
RXERR6
TXERR6
TSEG22
MC9S12XDP512 Data Sheet, Rev. 2.21
RXACT
CSCIF
CSCIE
SJW0
Bit 6
Bit 6
AM6
AC6
0
0
0
0
0
0
0
0
Detailed MSCAN Foreground Receive and Transmit Buffer
Detailed MSCAN Foreground Receive and Transmit Buffer
RSTATE1
RXERR5
TXERR5
TSEG21
RSTAT1
LOOPB
CSWAI
IDAM1
BRP5
Bit 5
Bit 5
AM5
AC5
FOREGROUND TRANSMIT BUFFER
0
0
0
0
0
0
0
FOREGROUND RECEIVE BUFFER
RSTATE0
RXERR4
TXERR4
TSEG20
RSTAT0
SYNCH
LISTEN
IDAM0
BRP4
Bit 4
Bit 4
AM4
AC4
0
0
0
0
0
0
0
TSTATE1
RXERR3
TSEG13
TXERR3
TSTAT1
BORM
BRP3
TIME
Bit 3
Bit 3
AM3
AC3
0
0
0
0
0
0
0
0
TSTATE0
ABTRQ2
RXERR2
TXERR2
TSEG12
ABTAK2
TSTAT0
TXEIE2
WUPM
IDHIT2
WUPE
BRP2
TXE2
Bit 2
AM2
Bit 2
TX2
AC2
0
0
Freescale Semiconductor
ABTRQ1
RXERR1
TXERR1
TSEG11
ABTAK1
SLPRQ
TXEIE1
SLPAK
IDHIT1
OVRIF
OVRIE
BRP1
TXE1
Bit 1
Bit 1
AM1
Layout)
Layout)
TX1
AC1
0
0
BOHOLD
RXERR0
ABTRQ0
TXERR0
TSEG10
ABTAK0
INITRQ
TXEIE0
IDHIT0
INITAK
RXFIE
BRP0
TXE0
Bit 0
Bit 0
AM0
RXF
AC0
TX0
0