MC9S12XDP512CAG Freescale Semiconductor, MC9S12XDP512CAG Datasheet - Page 1153

• Manufacturer Part Number: MC9S12XDP512CAG
• Description: IC MCU 512K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDP512CAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 32 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 119
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (24-ch x 10-bit)
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• For Use With: DEMO9S12XDT512E - BOARD DEMO FOR MC9S12XDT512EVB9S12XDP512E - BOARD DEMO FOR MC9S12XDP512
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

All bits in the FSEC register are readable but are not writable.
The FSEC register is loaded from the Flash Configuration Field at address 0x7F_FF0F during the reset
sequence, indicated by F in
The security function in the Flash module is described in
28.3.2.3
The FTSTMOD register is used to control Flash test features.
Freescale Semiconductor
KEYEN[1:0]
RNV[5:2]
SEC[1:0]
Reset
Field
7:6
5:2
1:0
W
R
Backdoor Key Security Enable Bits — The KEYEN[1:0] bits define the enabling of backdoor key access to the
Flash module as shown in
Reserved Nonvolatile Bits — The RNV[5:2] bits should remain in the erased state for future enhancements.
Flash Security Bits — The SEC[1:0] bits define the security state of the MCU as shown in
Flash module is unsecured using backdoor key access, the SEC[1:0] bits are forced to 1:0.
Flash Test Mode Register (FTSTMOD)
F
7
KEYEN
= Unimplemented or Reserved
1 Preferred KEYEN state to disable Backdoor Key Access.
1 Preferred SEC state to set MCU to secured state.
F
6
Figure
KEYEN[1:0]
SEC[1:0]
Figure 28-5. Flash Security Register (FSEC)
01
01
00
10
11
00
10
11
1
1
Table
Table 28-3. FSEC Field Descriptions
28-5.
MC9S12XDP512 Data Sheet, Rev. 2.21
RNV5
Table 28-5. Flash Security States
Table 28-4. Flash KEYEN States
F
5
28-4.
RNV4
Status of Backdoor Key Access
F
4
Description
Status of Security
Section 28.6, “Flash Module
UNSECURED
DISABLED
DISABLED
DISABLED
SECURED
SECURED
SECURED
ENABLED
RNV3
Chapter 28 256 Kbyte Flash Module (S12XFTX256K2V1)
F
3
RNV2
F
2
F
1
Security”.
Table
SEC
28-5. If the
F
0
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