D12312SVF20V Renesas Electronics America, D12312SVF20V Datasheet - Page 573

IC H8S/2312S MCU ROMLESS 100QFP

D12312SVF20V

Manufacturer Part Number
D12312SVF20V
Description
IC H8S/2312S MCU ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12312SVF20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12312SVF20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit 7
TRGS1
0
1
Bits 5, 4, 1, and 0—Reserved: These bits cannot be modified and are always read as 1.
Bit 3—Clock Select 1 (CKS1): Used together with the CKS bit in ADCSR to set the A/D
conversion time. See the description of the CKS bit for details.
Bit 2—Reserved: A value of 1 must be written to this bit.
14.2.4
MSTPCR is a 16-bit readable/writable register that performs module stop mode control.
When the MSTP9 bit in MSTPCR is set to 1, A/D converter operation stops at the end of the bus
cycle and a transition is made to module stop mode. Registers cannot be read or written to in
module stop mode. For details, see section 19.5, Module Stop Mode.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 9—Module Stop (MSTP9): Specifies the A/D converter module stop mode.
Bit 9
MSTP9
0
1
Bit
Initial value :
R/W
Module Stop Control Register (MSTPCR)
Bit 6
TRGS0
0
1
0
1
Description
A/D converter module stop mode cleared
A/D converter module stop mode set
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
15
0
14
0
Description
A/D conversion start by external trigger is disabled
A/D conversion start by external trigger (TPU) is enabled
A/D conversion start by external trigger (8-bit timer) is enabled
A/D conversion start by external trigger pin (ADTRG) is enabled
13
1
MSTPCRH
12
1
Section 14 A/D Converter (8 Analog Input Channel Version)
11
1
10
1
9
1
8
1
Rev.7.00 Feb. 14, 2007 page 539 of 1108
7
1
6
1
5
1
MSTPCRL
4
1
REJ09B0089-0700
3
1
2
1
(Initial value)
(Initial value)
1
1
0
1

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