D12312SVF20V Renesas Electronics America, D12312SVF20V Datasheet - Page 160

• Manufacturer Part Number: D12312SVF20V
• Description: IC H8S/2312S MCU ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVF20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 5 Interrupt Controller
8-Level Control: In interrupt control mode 2, 8-level mask level determination is performed for
the selected interrupts in interrupt acceptance control according to the interrupt priority level
(IPR).
The interrupt source selected is the interrupt with the highest priority level, and whose priority
level set in IPR is higher than the mask level.
Table 5.7
Interrupt Control Mode
0
2
Default Priority Determination: When an interrupt is selected by 8-level control, its priority is
determined and a vector number is generated.
If the same value is set for IPR, acceptance of multiple interrupts is enabled, and so only the
interrupt source with the highest priority according to the preset default priorities is selected and
has a vector number generated.
Interrupt sources with a lower priority than the accepted interrupt source are held pending.
Table 5.8 shows operations and control signal functions in each interrupt control mode.
Table 5.8
Legend:
X : No operation (All interrupts enabled)
IM : Used as interrupt mask bit
PR : Sets priority
— : Not used
Notes: 1. Set to 1 when interrupt is accepted.
Rev.7.00 Feb. 14, 2007 page 126 of 1108
REJ09B0089-0700
Interrupt
Control
Mode
: Interrupt operation control performed
0
2
2. Keep the initial setting.
INTM1 INTM0
Interrupts Selected in Each Interrupt Control Mode (2)
Operations and Control Signal Functions in Each Interrupt Control Mode
0
1
Setting
0
0
Selected Interrupts
All interrupts
Highest-priority-level (IPR) interrupt whose priority level is greater
than the mask level (IPR > I2 to I0)
X
Acceptance
Interrupt
Control
— *
IM
I
1
X
8-Level Control
I2 to I0
IM
—
— *
IPR
PR
2
Default Priority
Determination
(Trace)
—
T
T