D12312SVF20V Renesas Electronics America, D12312SVF20V Datasheet - Page 385

• Manufacturer Part Number: D12312SVF20V
• Description: IC H8S/2312S MCU ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12312SVF20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

9.4.4
Buffer operation, provided for channels 0 and 3, enables TGRC and TGRD to be used as buffer
registers.
Buffer operation differs depending on whether TGR has been designated as an input capture
register or as a compare match register.
Table 9.5 shows the register combinations used in buffer operation.
Table 9.5
Channel
0
3
• When TGR is an output compare register
Buffer register
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 9.16.
Buffer Operation
Register Combinations in Buffer Operation
Timer General Register
TGR0A
TGR0B
TGR3A
TGR3B
Figure 9.16 Compare Match Buffer Operation
Compare match signal
Timer general
register
Rev.7.00 Feb. 14, 2007 page 351 of 1108
Section 9 16-Bit Timer Pulse Unit (TPU)
Comparator
Buffer Register
TGR0C
TGR0D
TGR3C
TGR3D
REJ09B0089-0700
TCNT