M38D59GCHP#U0 Renesas Electronics America, M38D59GCHP#U0 Datasheet - Page 35

• Manufacturer Part Number: M38D59GCHP#U0
• Description: IC 740/38D5 MCU QZ-ROM 80LQFP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38D59GCHP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 12.5MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, LED, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: QzROM
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

38D5 Group
Rev.3.04
REJ03B0158-0304
• Key Input Interrupt (Key-on Wake-Up)
A key input interrupt request is generated by detecting the falling
edge from any pin of ports P2
to input mode. In other words, it is generated when AND of input
level goes from “1” to “0”. An example of using a key input
Fig. 23 Connection example when using key input interrupt
May 20, 2008 Page 33 of 134
P2
P2
P2
P2
2
1
P4
P4
P4
P4
3
0
output
output
output
output
7
6
5
4
input
input
input
input
Port PXx
“L” level output
0
−P2
∗
∗
∗
∗
∗
∗
∗
∗
3
, P4
Segment output
disable register 1
Bit 0 = “1”
Segment output
disable register 1
Bit 3 = “1”
Segment output
disable register 1
Bit 2 = “1”
Segment output
disable register 1
Bit 1 = “1”
PULL register 3
Bit 1 = “1”
4
−P4
∗∗
∗∗
∗∗
∗∗
∗∗
∗∗
∗∗
∗∗
7
that have been set
Port P4 direction
register bit 7 = “0”
Port P4 direction
register bit 5 = “0”
Port P4 direction
register bit 4 = “0”
Port P4 direction
register bit 6 = “0”
Port P4
latch
Port P4
latch
Port P4
latch
Port P2
latch
Port P2
latch
Port P2
latch
Port P2
latch
Port P4
latch
Port P2 direction
register bit 3 = “1”
Port P2
register bit 2 = “1”
Port P2 direction
register bit 1 = “1”
Port P2 direction
register bit 0 = “1”
4
2
6
5
3
1
0
7
2
Key input control
register bit 2 = “1”
Key input control
register bit 3 = “1”
Key input control
register bit 7 = “1”
direction
Key input control
register bit 4 = “1”
Key input control
register bit 5 = “1”
Key input control
register bit 1 = “1”
Key input control
register bit 6 = “1”
Key input control
register bit 0 = “1”
interrupt is shown in Figure 23, where an interrupt request is
generated by pressing one of the keys consisted as an active-low
key matrix which inputs to ports P4
∗∗ CMOS output buffer
∗ P-channel transistor for pull-up
4
−P4
Key input interrupt request
7
.
Port P4
Input reading circuit
Port P2
Input reading circuit