M38D59GCHP#U0 Renesas Electronics America, M38D59GCHP#U0 Datasheet - Page 14

• Manufacturer Part Number: M38D59GCHP#U0
• Description: IC 740/38D5 MCU QZ-ROM 80LQFP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38D59GCHP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 12.5MHz
• Connectivity: SIO, UART/USART
• Peripherals: LCD, LED, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: QzROM
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

38D5 Group
Rev.3.04
REJ03B0158-0304
FUNCTIONAL DESCRIPTION
Central Processing Unit (CPU)
The 38D5 Group uses the standard 740 Family instruction set.
Refer to the 740 Family Software Manual for details on the
instruction set.
Machine-resident 740 Family instructions are as follows:
The central processing unit (CPU) has six registers. Figure 6
shows the 740 Family CPU register structure.
[Accumulator (A)]
The accumulator is an 8-bit register. Data operations such as
arithmetic data transfer, etc., are executed mainly through the
accumulator.
[Index Register X (X)]
The index register X is an 8-bit register. In the index addressing
modes, the value of the OPERAND is added to the contents of
register X and specifies the real address.
[Index Register Y (Y)]
The index register Y is an 8-bit register. In partial instruction, the
value of the OPERAND is added to the contents of register Y
and specifies the real address.
Fig. 6 740 Family CPU register structure
The FST and SLW instructions cannot be used.
The STP, WIT, MUL, and DIV instructions can be used.
May 20, 2008 Page 12 of 134
b15
PC
H
b7
b7
b7
b7
b7
b7
N
V
T
PC
B
A
X
Y
S
D
L
I
Z
b0
b0
b0
b0
b0
b0
C
[Stack Pointer (S)]
The stack pointer is an 8-bit register used during subroutine calls
and interrupts. This register indicates start address of stored area
(stack) for storing registers during subroutine calls and
interrupts.
The low-order 8 bits of the stack address are determined by the
contents of the stack pointer. The high-order 8 bits of the stack
address are determined by the stack page selection bit. If the
stack page selection bit is “0”, the high-order 8 bits becomes
“00
becomes “01
The operations of pushing register contents onto the stack and
popping them from the stack are shown in Figure 7.
Table 7 shows the push and pop instructions of accumulator or
processor status register.
Store registers other than those described in Figure 7 with
program when the user needs them during interrupts or
subroutine calls.
[Program Counter (PC)]
The program counter is a 16-bit counter consisting of two 8-bit
registers PC
next instruction to be executed.
16
Accumulator
Index register X
Index register Y
Stack pointer
Program counter
Carry flag
Zero flag
Interrupt disable flag
Decimal mode flag
Break flag
Index X mode flag
Overflow flag
Negative flag
Processor status register (PS)
”. If the stack page selection bit is “1”, the high-order 8 bits
H
16
and PC
”.
L
. It is used to indicate the address of the