M38D59GCHP#U0 Renesas Electronics America, M38D59GCHP#U0 Datasheet - Page 24
M38D59GCHP#U0
Manufacturer Part Number
M38D59GCHP#U0
Description
IC 740/38D5 MCU QZ-ROM 80LQFP
Manufacturer
Renesas Electronics America
Series
740/38000r
Datasheet
1.M38D58G8FPU0.pdf
(144 pages)
Specifications of M38D59GCHP#U0
Core Processor
740
Core Size
8-Bit
Speed
12.5MHz
Connectivity
SIO, UART/USART
Peripherals
LCD, LED, PWM, WDT
Number Of I /o
59
Program Memory Size
48KB (48K x 8)
Program Memory Type
QzROM
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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38D5 Group
Rev.3.04
REJ03B0158-0304
Fig. 14 Port block diagram (1)
Serial I/O1 synchronous clock
Data bus
(1) Ports P0, P1, P2
(3) Port P4
Serial I/O1 mode selection bit
(5) Port P4
Segment output disable bit
Serial I/O1 enable bit
Data bus
Data bus
Serial I/O1 clock output
May 20, 2008 Page 22 of 134
Serial I/O1 enable bit
Serial I/O enable bit
selection bit
Receive enable bit
0
2
Port latch
Direction
register
Port latch
Port latch
Direction
Direction
register
register
Serial I/O1 clock input
4
-P2
Segment data
7
Serial I/O input
, P3
Pull-up control
Pull-up control
V
V
L1
L3
/V
/V
SS
L2
Data bus
(4) Port P4
(6) Port P4
(2) Ports P2
Serial I/O1 mode selection bit
Key-on wakeup
interrupt input
Segment output disable bit
Data bus
Data bus
S
RDY1
Serial I/O1 enable bit
P4
Serial I/O1 enable bit
1
Serial I/O1 ready output
/TxD P-channel output disable bit
Transmit enable bit
output enable bit
1
3
0
-P2
Port latch
Direction
register
Serial I/O output
3
Port latch
Direction
register
Direction
Port latch
register
Segment data
Key input control
Pull-up control
Pull-up control
V
V
L1
L3
/V
/V
SS
L2
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