MC9S12XET256CAG Freescale Semiconductor, MC9S12XET256CAG Datasheet - Page 803

• Manufacturer Part Number: MC9S12XET256CAG
• Description: MCU 16BIT 256K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XET256CAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: S12XE
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Read: Anytime
Write: Anytime.
22.3.2.10 Timer Interrupt Enable Register (TIE)
Read: Anytime
Write: Anytime.
Freescale Semiconductor
Module Base + 0x000C
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
EDGnB
EDGnA
C7I:C0I
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
Field
7:0
7:0
W
R
Input Capture Edge Control — These eight pairs of control bits configure the input capture edge detector
circuits.
Input Capture/Output Compare “x” Interrupt Enable — The bits in TIE correspond bit-for-bit with the bits in
the TFLG1 status register. If cleared, the corresponding flag is disabled from causing a hardware interrupt. If set,
the corresponding flag is enabled to cause a interrupt.
C7I
0
7
C6I
0
6
EDGnB
Figure 22-18. Timer Interrupt Enable Register (TIE)
Table 22-12. Edge Detector Circuit Configuration
0
0
1
1
Table 22-11. TCTL3/TCTL4 Field Descriptions
MC9S12XE-Family Reference Manual Rev. 1.23
Table 22-13. TIE Field Descriptions
C5I
EDGnA
5
0
0
1
0
1
Capture on any edge (rising or falling)
C4I
0
4
Capture on falling edges only
Capture on rising edges only
Description
Description
Capture disabled
Configuration
Chapter 22 Timer Module (TIM16B8CV2) Block Description
C3I
0
3
C2I
2
0
C1I
0
1
C0I
0
0
803