MC9S12XET256CAG Freescale Semiconductor, MC9S12XET256CAG Datasheet - Page 375

• Manufacturer Part Number: MC9S12XET256CAG
• Description: MCU 16BIT 256K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XET256CAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: S12XE
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.3.1.18 XGATE Register 6 (XGR6)
The XGR6 register
Module Base +0x0002C
Read: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
Write: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
10.3.1.19 XGATE Register 7 (XGR7)
The XGR7 register
Module Base +0x0002E
Read: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
Write: In debug mode if unsecured and not idle (XGCHID ≠ 0x00)
10.4
The core of the XGATE module is a RISC processor which is able to access the MCU’s internal memories
and peripherals (see
by an XGATE request. Then it executes a code sequence (thread) that is associated with the requested
XGATE channel. Each thread can run on a priority level ranging from 1 to 7. Refer to the S12X_INT
Freescale Semiconductor
Reset
Reset
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
XGR6[15:0]
XGR7[15:0]
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
W
W
R
R
Field
15–0
Field
15–0
15
15
0
0
Functional Description
XGATE Register 6 — The RISC core’s register 6
XGATE Register 7 — The RISC core’s register 7
14
14
0
0
(Figure
(Figure
13
13
Figure
0
0
12
12
0
0
10-20) provides access to the RISC core’s register 6.
10-21) provides access to the RISC core’s register 7.
10-1). The RISC processor always remains in an idle state until it is triggered
MC9S12XE-Family Reference Manual Rev. 1.23
11
11
Figure 10-20. XGATE Register 6 (XGR6)
Figure 10-21. XGATE Register 7 (XGR7)
0
0
Table 10-20. XGR6 Field Descriptions
Table 10-21. XGR7 Field Descriptions
10
10
0
0
0
0
9
9
0
0
8
8
XGR6
XGR7
Description
Description
0
0
7
7
6
0
6
0
0
0
5
5
0
0
4
4
Chapter 10 XGATE (S12XGATEV3)
0
0
3
3
0
0
2
2
1
0
1
0
0
0
0
0
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