S9S12P64J0MFT Freescale Semiconductor, S9S12P64J0MFT Datasheet - Page 467
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S9S12P64J0MFT
Manufacturer Part Number
S9S12P64J0MFT
Description
MCU 64K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of S9S12P64J0MFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Upon clearing CCIF to launch the Erase Verify D-Flash Section command, the Memory Controller will
verify the selected section of D-Flash memory is erased. The CCIF flag will set after the Erase Verify D-
Flash Section operation has completed.
13.4.5.15 Program D-Flash Command
The Program D-Flash operation programs one to four previously erased words in the D-Flash block. The
Program D-Flash operation will confirm that the targeted location(s) were successfully programmed upon
completion.
Freescale Semiconductor
Register
FSTAT
A Flash word must be in the erased state before being programmed.
Cumulative programming of bits within a Flash word is not allowed.
Table 13-59. Erase Verify D-Flash Section Command FCCOB Requirements
Table 13-60. Erase Verify D-Flash Section Command Error Handling
CCOBIX[2:0]
Table 13-61. Program D-Flash Command FCCOB Requirements
MGSTAT1
MGSTAT0
ACCERR
Error Bit
FPVIOL
CCOBIX[2:0]
000
001
010
011
100
000
001
010
S12P-Family Reference Manual, Rev. 1.13
Set if CCOBIX[2:0] != 010 at command launch
Set if command not available in current mode (see
Set if an invalid global address [17:0] is supplied
Set if a misaligned word address is supplied (global address [0] != 0)
Set if the requested section breaches the end of the D-Flash block
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
Global address [15:0] of the first word to be verified
Global address [15:0] of word to be programmed
0x11
Word 1 program value, if desired
Word 2 program value, if desired
0x10
Number of words to be verified
CAUTION
Word 0 program value
FCCOB Parameters
FCCOB Parameters
Global address [17:16] to
identify the D-Flash block
Error Condition
Global address [17:16] to
identify the D-Flash block
128 KByte Flash Module (S12FTMRC128K1V1)
Table
13-27)
467
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