S9S12P64J0MFT Freescale Semiconductor, S9S12P64J0MFT Datasheet - Page 153
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S9S12P64J0MFT
Manufacturer Part Number
S9S12P64J0MFT
Description
MCU 64K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of S9S12P64J0MFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Background Debug Module (S12SBDMV1)
handshake protocol is enabled, the time out between a read command and the data retrieval is disabled.
Therefore, the host could wait for more then 512 serial clock cycles and still be able to retrieve the data
from an issued read command. However, once the handshake pulse (ACK pulse) is issued, the time-out
feature is re-activated, meaning that the target will time out after 512 clock cycles. Therefore, the host
needs to retrieve the data within a 512 serial clock cycles time frame after the ACK pulse had been issued.
After that period, the read command is discarded and the data is no longer available for retrieval. Any
negative edge in the BKGD pin after the time-out period is considered to be a new command or a SYNC
request.
Note that whenever a partially issued command, or partially retrieved data, has occurred the time out in the
serial communication is active. This means that if a time frame higher than 512 serial clock cycles is
observed between two consecutive negative edges and the command being issued or data being retrieved
is not complete, a soft-reset will occur causing the partially received command or data retrieved to be
disregarded. The next negative edge in the BKGD pin, after a soft-reset has occurred, is considered by the
target as the start of a new BDM command, or the start of a SYNC request pulse.
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
153
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