S9S12P64J0MFT Freescale Semiconductor, S9S12P64J0MFT Datasheet - Page 100
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S9S12P64J0MFT
Manufacturer Part Number
S9S12P64J0MFT
Description
MCU 64K FLASH AUTO 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of S9S12P64J0MFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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1. Read: Anytime
1. Read: Always reads 0x00
Port Integration Module (S12PPIMV1)
2.3.64
2.3.65
2.4
2.4.1
Each pin except PE0, PE1, and BKGD can act as general purpose I/O. In addition each pin can act as an
output or input of a peripheral module.
2.4.2
A set of configuration registers is common to all ports with exception of the ATD port
registers can be written at any time, however a specific configuration might not become active.
100
Address 0x0277
Address 0x0278-0x27F
PER1AD
Write: Anytime
Write: Unimplemented
Field
Reset
Reset
7-0
W
W
R
R
PER1AD7
Functional Description
Port AD pull-up enable—Enable pull-up device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect.
1 Pull device enabled
0 Pull device disabled
Port AD Pull Up Enable Register (PER1AD)
PIM Reserved Registers
General
Registers
0
0
0
7
7
= Unimplemented or Reserved
PER1AD6
Figure 2-62. Port AD Pull Up Enable Register (PER1AD)
0
0
0
6
6
Table 2-58. PER1AD Register Field Descriptions
PER1AD5
S12P-Family Reference Manual, Rev. 1.13
Figure 2-63. PIM Reserved Registers
5
0
5
0
0
PER1AD4
0
0
0
4
4
Description
u = Unaffected by reset
PER1AD3
0
0
0
3
3
PER1AD2
0
0
0
2
2
PER1AD1
Access: User read/write
Freescale Semiconductor
(Table
0
0
0
1
1
Access: User read
2-59). All
PER1AD0
0
0
0
0
0
(1)
(1)
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