P89CV51RD2FBC,557 NXP Semiconductors, P89CV51RD2FBC,557 Datasheet - Page 44

• Manufacturer Part Number: P89CV51RD2FBC,557
• Description: IC 80C51 MCU FLASH 64K 44-TQFP
• Manufacturer: NXP Semiconductors
• Series: 89Cr

Specifications of P89CV51RD2FBC,557

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: P89CV5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Cpu Family: 89C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 40MHz
• Total Internal Ram Size: 1KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4257; 935284103557; P89CV51RD2FBC

NXP Semiconductors
P89CV51RB2_RC2_RD2_3
Product data sheet
6.9 PCA
way to disable the WDT, except through a reset (either a hardware reset or a WDT
overflow reset). When the WDT overflows, it will drive an output reset HIGH pulse at the
RST pin.
When the WDT is enabled (and thus running) the user needs to reset it by writing 01EH
and 0E1H, in sequence, to the WDTRST SFR to avoid WDT overflow. The 14-bit counter
reaches overflow when it reaches 16383 (3FFFH) and this will reset the device.
The WDT’s counter cannot be read or written. When the WDT overflows it will generate an
output pulse at the RST pin with a duration of 98 oscillator periods in 6-clock mode or 196
oscillator periods in 12-clock mode.
The PCA includes a special 16-bit timer that has five 16-bit capture/compare modules
associated with it. Each of the modules can be programmed to operate in one of four
modes: rising and/or falling edge capture, software timer, high-speed output, or
pulse-width modulator. Each module has a pin associated with it: Module 0 is connected
to CEX0, module 1 to CEX1, etc. Registers CH and CL contain the current value of the
free-running up-counting 16-bit PCA timer. The PCA timer is a common time base for all
five modules and can be programmed to run at:
oscillator frequency, the Timer 0 overflow, or the input on the ECI pin (P1[2]). The timer
count source is determined from the CPS1 and CPS0 bits in the CMOD SFR; see
Table 32
In the CMOD SFR there are three additional bits associated with the PCA. They are CIDL
which allows the PCA to stop during Idle mode, WDTE which enables or disables the
watchdog function on module 4, and ECF which when set causes an interrupt and the
PCA overflow flag CF (in the CCON SFR) to be set when the PCA timer overflows.
The watchdog timer function is implemented in module 4 of PCA.
The CCON SFR contains the run control bit for the PCA (CR) and the flags for the PCA
timer (CF) and each module (CCF[4:0]). To run the PCA the CR bit (CCON.6) must be set
by software. The PCA is shut off by clearing this bit. The CF bit (CCON.7) is set when the
PCA counter overflows and an interrupt will be generated if the ECF bit in the CMOD
Fig 19. PCA
time base for PCA modules
Module functions:
- 16-bit capture
- 16-bit timer
- 16-bit high speed output
- 8-bit PWM
- watchdog timer (module 4 only)
and
PCA TIMER/COUNTER
Table
16 bits
33.
Rev. 03 — 25 August 2009
P89CV51RB2/RC2/RD2
1
6
MODULE3
MODULE4
MODULE0
MODULE1
MODULE2
the oscillator frequency,
16 bits
80C51 with 1 kB RAM, SPI
© NXP B.V. 2009. All rights reserved.
P1[3]/CEX0
P1[4]/CEX1
P1[5]/CEX2
P1[6]/CEX3
P1[7]/CEX4
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1
2
the
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