ATSAM3U2EA-AU Atmel, ATSAM3U2EA-AU Datasheet - Page 93
![IC MCU 32BIT 128KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
ATSAM3U2EA-AU
Manufacturer Part Number
ATSAM3U2EA-AU
Description
IC MCU 32BIT 128KB FLASH 144LQFP
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U2EA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Controller Family/series
SAM3U
No. Of I/o's
96
Ram Memory Size
36KB
Cpu Speed
96MHz
No. Of Timers
3
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
36 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (25Mb)
6430D–ATARM–25-Mar-11
Table 13-13. Cortex-M3 instructions (Continued)
Mnemonic
RBIT
REV
REV16
REVSH
ROR, RORS
RRX, RRXS
RSB, RSBS
SBC, SBCS
SBFX
SDIV
SEV
SMLAL
SMULL
SSAT
STM
STMDB,
STMEA
STMFD,
STMIA
STR
STRB,
STRBT
STRD
STREX
STREXB
STREXH
STRH,
STRHT
STRT
SUB, SUBS
SUB, SUBW
SVC
SXTB
SXTH
TBB
TBH
Operands
Rd, Rn
Rd, Rn
Rd, Rn
Rd, Rn
Rd, Rm, <Rs|#n>
Rd, Rm
{Rd,} Rn, Op2
{Rd,} Rn, Op2
Rd, Rn, #lsb, #width
{Rd,} Rn, Rm
-
RdLo, RdHi, Rn, Rm
RdLo, RdHi, Rn, Rm
Rd, #n, Rm {,shift #s}
Rn{!}, reglist
Rn{!}, reglist
Rn{!}, reglist
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rt, Rt2, [Rn, #offset]
Rd, Rt, [Rn, #offset]
Rd, Rt, [Rn]
Rd, Rt, [Rn]
Rt, [Rn, #offset]
Rt, [Rn, #offset]
{Rd,} Rn, Op2
{Rd,} Rn, #imm12
#imm
{Rd,} Rm {,ROR #n}
{Rd,} Rm {,ROR #n}
[Rn, Rm]
[Rn, Rm, LSL #1]
Brief description
Reverse Bits
Reverse byte order in a word
Reverse byte order in each halfword
Reverse byte order in bottom halfword
and sign extend
Rotate Right
Rotate Right with Extend
Reverse Subtract
Subtract with Carry
Signed Bit Field Extract
Signed Divide
Send Event
Signed Multiply with Accumulate (32 x
32 + 64), 64-bit result
Signed Multiply (32 x 32), 64-bit result
Signed Saturate
Store Multiple registers, increment after -
Store Multiple registers, decrement
before
Store Multiple registers, increment after -
Store Register word
Store Register byte
Store Register two words
Store Register Exclusive
Store Register Exclusive byte
Store Register Exclusive halfword
Store Register halfword
Store Register word
Subtract
Subtract
Supervisor Call
Sign extend a byte
Sign extend a halfword
Table Branch Byte
Table Branch Halfword
SAM3U Series
Flags
-
N,Z,C
N,Z,C,V
N,Z,C,V
-
-
-
-
-
-
-
-
-
N,Z,C,V
-
-
-
-
-
-
N,Z,C
-
Q
-
-
-
-
N,Z,C,V
-
-
Page
page 133
page 133
page 133
page 133
page 126
page 126
page 121
page 121
page 143
page 138
page 162
page 137
page 137
page 139
page 113
page 113
page 113
page 108
page 108
page 108
page 116
page 116
page 116
page 108
page 108
page 121
page 121
page 163
page 144
page 144
page 151
page 151
93
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