ATSAM3U2EA-AU Atmel, ATSAM3U2EA-AU Datasheet - Page 755
![IC MCU 32BIT 128KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
ATSAM3U2EA-AU
Manufacturer Part Number
ATSAM3U2EA-AU
Description
IC MCU 32BIT 128KB FLASH 144LQFP
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U2EA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Controller Family/series
SAM3U
No. Of I/o's
96
Ram Memory Size
36KB
Cpu Speed
96MHz
No. Of Timers
3
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
36 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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36. Timer Counter (TC)
36.1
36.2
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
Description
Embedded Characteristics
The Timer Counter (TC) includes 9 identical 16-bit Timer Counter channels.
Each channel can be independently programmed to perform a wide range of functions including
frequency measurement, event counting, interval measurement, pulse generation, delay timing
and pulse width modulation.
Each channel has three external clock inputs, five internal clock inputs and two multi-purpose
input/output signals which can be configured by the user. Each channel drives an internal inter-
rupt signal which can be programmed to generate processor interrupts.
The Timer Counter (TC) embeds a quadrature decoder logic connected in front of the timers and
driven by TIOA0, TIOB0 and TIOA1 inputs. When enabled, the quadrature decoder performs the
input lines filtering, decoding of quadrature signals and connects to the timers/counters in order
to read the position and speed of the motor through the user interface.
The Timer Counter block has two global registers which act upon all TC channels.
The Block Control Register allows the channels to be started simultaneously with the same
instruction.
The Block Mode Register defines the external clock inputs for each channel, allowing them to be
chained.
Table 36-1
Counter 0 to 2.
Table 36-1.
Note:
Name
TIMER_CLOCK1
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
• Provides 9 16-bit Timer Counter channels
• Wide range of functions including:
– Frequency measurement
– Event counting
– Interval measurement
– Pulse generation
– Delay timing
– Pulse Width Modulation
– Up/down capabilities
1. When Slow Clock is selected for Master Clock (CSS = 0 in PMC Master CLock Register),
TIMER_CLOCK5 input is Master Clock, i.e., Slow CLock modified by PRES and MDIV fields.
gives the assignment of the device Timer Counter clock inputs common to Timer
Timer Counter Clock Assignment
(1)
Definition
MCK/2
MCK/8
MCK/32
MCK/128
SLCK
SAM3U Series
SAM3U Series
755
755
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