ATSAM3U2EA-AU Atmel, ATSAM3U2EA-AU Datasheet - Page 826
![IC MCU 32BIT 128KB FLASH 144LQFP](/photos/6/72/67244/144l1-lqfp_sml.jpg)
ATSAM3U2EA-AU
Manufacturer Part Number
ATSAM3U2EA-AU
Description
IC MCU 32BIT 128KB FLASH 144LQFP
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U2EA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Controller Family/series
SAM3U
No. Of I/o's
96
Ram Memory Size
36KB
Cpu Speed
96MHz
No. Of Timers
3
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
36 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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37.8.1
37.8.2
37.9
37.9.1
826
CE-ATA Operation
SAM3U Series
SDIO Data Transfer Type
SDIO Interrupts
Executing an ATA Polling Command
The SD/SDIO Card Register (HSMCI_SDCR) allows selection of the Card Slot and the data bus
width.
The SD/SDIO Card bus allows dynamic configuration of the number of data lines. After power
up, by default, the SD/SDIO Card uses only DAT0 for data transfer. After initialization, the host
can change the bus width (number of active data lines).
SDIO cards may transfer data in either a multi-byte (1 to 512 bytes) or an optional block format
(1 to 511 blocks), while the SD memory cards are fixed in the block transfer mode. The TRTYP
field in the HSMCI Command Register (HSMCI_CMDR) allows to choose between SDIO Byte or
SDIO Block transfer.
The number of bytes/blocks to transfer is set through the BCNT field in the HSMCI Block Regis-
ter (HSMCI_BLKR). In SDIO Block mode, the field BLKLEN must be set to the data block size
while this field is not used in SDIO Byte mode.
An SDIO Card can have multiple I/O or combined I/O and memory (called Combo Card). Within
a multi-function SDIO or a Combo card, there are multiple devices (I/O and memory) that share
access to the SD bus. In order to allow the sharing of access to the host among multiple devices,
SDIO and combo cards can implement the optional concept of suspend/resume (Refer to the
SDIO Specification for more details). To send a suspend or a resume command, the host must
set the SDIO Special Command field (IOSPCMD) in the HSMCI Command Register.
Each function within an SDIO or Combo card may implement interrupts (Refer to the SDIO
Specification for more details). In order to allow the SDIO card to interrupt the host, an interrupt
function is added to a pin on the DAT[1] line to signal the card’s interrupt to the host. An SDIO
interrupt on each slot can be enabled through the HSMCI Interrupt Enable Register. The SDIO
interrupt is sampled regardless of the currently selected slot.
CE-ATA maps the streamlined ATA command set onto the MMC interface. The ATA task file is
mapped onto MMC register space.
CE-ATA utilizes five MMC commands:
CE-ATA utilizes the same MMC command sequences for initialization as traditional MMC
devices.
• GO_IDLE_STATE (CMD0): used for hard reset.
• STOP_TRANSMISSION (CMD12): causes the ATA command currently executing to be
• FAST_IO (CMD39): Used for single register access to the ATA taskfile registers, 8 bit access
• RW_MULTIPLE_REGISTERS (CMD60): used to issue an ATA command or to access the
• RW_MULTIPLE_BLOCK (CMD61): used to transfer data for an ATA command.
1. Issue READ_DMA_EXT with RW_MULTIPLE_REGISTER (CMD60) for 8kB of DATA.
2. Read the ATA status register until DRQ is set.
aborted.
only.
control/status registers.
6430D–ATARM–25-Mar-11
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