ATSAM3U2EA-AU Atmel, ATSAM3U2EA-AU Datasheet - Page 893

• Manufacturer Part Number: ATSAM3U2EA-AU
• Description: IC MCU 32BIT 128KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: SAM3Ur

Specifications of ATSAM3U2EA-AU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 36K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b, 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Controller Family/series: SAM3U
• No. Of I/o's: 96
• Ram Memory Size: 36KB
• Cpu Speed: 96MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 36 KB
• Interface Type: 4xUSART, 2xTWI, 5xSPI, Bus
• Maximum Clock Frequency: 96 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 8
• Operating Supply Voltage: 1.62 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3U-EK
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
the register group is write-protected. The field WPCMD allows to perform the following actions
depending on its value:
At any time, the user can determine which Write Protect is active in which register group by the
fields WPSWS and WPHWS in the
(PWM_WPSR).
If a write access in a write-protected register is detected, then the WPVS flag in the
PWM_WPSR register is set and the field WPVSRC indicates in which register the write access
has been attempted, through its address offset without the two LSBs.
The WPVS and PWM_WPSR fields are automatically reset after reading the PWM_WPSR
register.
• 0 = Disabling the Write Protect SW of the register groups of which the bit WPRG is at 1.
• 1 = Enabling the Write Protect SW of the register groups of which the bit WPRG is at 1.
• 2 = Enabling the Write Protect HW of the register groups of which the bit WPRG is at 1.
“PWM Write Protect Status Register” on page 928
SAM3U Series
SAM3U Series
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