ATMEGA32-16AU Atmel, ATMEGA32-16AU Datasheet - Page 115

IC AVR MCU 32K 16MHZ 5V 44TQFP

ATMEGA32-16AU

Manufacturer Part Number
ATMEGA32-16AU
Description
IC AVR MCU 32K 16MHZ 5V 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
16MHz
No. Of Timers
3
Rohs Compliant
Yes
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
TQFP
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Definitions
Timer/Counter
Clock Sources
Counter Unit
2503Q–AVR–02/11
The double buffered Output Compare Register (OCR2) is compared with the Timer/Counter
value at all times. The result of the compare can be used by the waveform generator to generate
a PWM or variable frequency output on the Output Compare Pin (OC2).
Unit” on page 116.
which can be used to generate an output compare interrupt request.
Many register and bit references in this document are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 2. However, when using the register or bit
defines in a program, the precise form must be used (that is, TCNT2 for accessing
Timer/Counter2 counter value and so on). The definitions in
throughout the document.
Table 49. Definitions
The Timer/Counter can be clocked by an internal synchronous or an external asynchronous
clock source. The clock source clk
bit in the ASSR Register is written to logic one, the clock source is taken from the Timer/Counter
Oscillator connected to TOSC1 and TOSC2. For details on asynchronous operation, see
chronous Status Register – ASSR” on page
“Timer/Counter Prescaler” on page
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
54
Figure 54. Counter Unit Block Diagram
Signal description (internal signals):
BOTTOM
MAX
TOP
count
direction
clear
clk
top
shows a block diagram of the counter and its surrounding environment.
T2
DATA BUS
TCNTn
The counter reaches the BOTTOM when it becomes zero (0x00).
The counter reaches its MAXimum when it becomes 0xFF (decimal
255).
The counter reaches the TOP when it becomes equal to the highest
value in the count sequence. The TOP value can be assigned to be the
fixed value 0xFF (MAX) or the value stored in the OCR2 Register. The
assignment is dependent on the mode of operation.
Increment or decrement TCNT2 by 1.
Selects between increment and decrement.
Clear TCNT2 (set all bits to zero).
Timer/Counter clock.
Signalizes that TCNT2 has reached maximum value.
for details. The compare match event will also set the Compare Flag (OCF2)
direction
count
clear
bottom
Control Logic
T2
131.
is by default equal to the MCU clock, clk
top
128. For details on clock sources and prescaler, see
TOVn
(Int.Req.)
clk
Tn
Prescaler
Table 49
ATmega32(L)
are also used extensively
Oscillator
See “Output Compare
T/C
I/O
clk
. When the AS2
I/O
TOSC2
TOSC1
“Asyn-
Figure
115

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