ATMEGA32-16AU Atmel, ATMEGA32-16AU Datasheet - Page 105

IC AVR MCU 32K 16MHZ 5V 44TQFP

ATMEGA32-16AU

Manufacturer Part Number
ATMEGA32-16AU
Description
IC AVR MCU 32K 16MHZ 5V 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
16MHz
No. Of Timers
3
Rohs Compliant
Yes
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
TQFP
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Timer/Counter
Timing Diagrams
2503Q–AVR–02/11
output will be continuously low and if set equal to TOP the output will be set to high for non-
inverted PWM mode. For inverted PWM the output will have the opposite logic values. If OCR1A
is used to define the TOP value (WGM13:0 = 9) and COM1A1:0 = 1, the OC1A output will toggle
with a 50% duty cycle.
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when Interrupt
Flags are set, and when the OCR1x Register is updated with the OCR1x buffer value (only for
modes utilizing double buffering).
Figure 49. Timer/Counter Timing Diagram, Setting of OCF1x, No Prescaling
Figure 50
Figure 50. Timer/Counter Timing Diagram, Setting of OCF1x, with Prescaler (f
Figure 51
frequency correct PWM mode the OCR1x Register is updated at BOTTOM. The timing diagrams
TCNTn
OCRnx
OCFnx
TCNTn
OCRnx
(clk
OCFnx
(clk
clk
clk
clk
clk
I/O
I/O
I/O
Tn
I/O
Tn
shows the same timing data, but with the prescaler enabled.
/8)
/1)
shows the count sequence close to TOP in various modes. When using phase and
OCRnx - 1
OCRnx - 1
Figure 49
OCRnx
OCRnx
shows a timing diagram for the setting of OCF1x.
OCRnx Value
OCRnx Value
OCRnx + 1
OCRnx + 1
T1
ATmega32(L)
) is therefore shown as a
OCRnx + 2
OCRnx + 2
clk_I/O
/8)
105

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