ATMEGA16U4-AU Atmel, ATMEGA16U4-AU Datasheet - Page 285

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ATMEGA16U4-AU

Manufacturer Part Number
ATMEGA16U4-AU
Description
MCU AVR 16K FLASH USB 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA16U4-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
26
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
26
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA16U4-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA16U4-AUR
Manufacturer:
Atmel
Quantity:
10 000
7766F–AVR–11/10
• 7-3 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 2 - CTRLDIR - Control Direction (Flag, and bit for debug purpose)
Set by hardware after a SETUP packet, and gives the direction of the following packet:
- 1 for IN endpoint
- 0 for OUT endpoint.
Can not be set or cleared by software.
• 1-0 - CURRBK1:0 - Current Bank (all endpoints except Control endpoint) Flag
Set by hardware to indicate the number of the current bank:
00b Bank0
01b Bank1
1xb
Can not be set or cleared by software.
• 7 - FIFOCON - FIFO Control Bit
For OUT and SETUP Endpoint:
Set by hardware when a new OUT message is stored in the current bank, at the same time than
RXOUT or RXSTP.
Clear to free the current bank and to switch to the following bank. Setting by software has no
effect.
For IN Endpoint:
Set by hardware when the current bank is free, at the same time than TXIN.
Clear to send the FIFO data and to switch the bank. Setting by software has no effect.
• 6 - NAKINI - NAK IN Received Interrupt Flag
Set by hardware when a NAK handshake has been sent in response of a IN request from the
host. This triggers an USB interrupt if NAKINE is sent.
Shall be cleared by software. Setting by software has no effect.
Reserved.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
FIFOCON
R/W
7
0
R
7
0
-
NAKINI
R/W
R
6
0
-
6
0
RWAL
R/W
5
0
R
5
0
-
NAKOUTI
R/W
4
0
R
4
0
-
RXSTPI
R/W
3
0
R
3
0
-
CTRLDIR
RXOUTI
R/W
ATmega16/32U4
R
2
0
2
0
STALLEDI
R/W
R
1
0
1
0
CURRBK1:0
TXINI
R/W
R
0
0
0
0
UESTA1X
UEINTX
285

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