ATMEGA16U4-AU Atmel, ATMEGA16U4-AU Datasheet - Page 115

• Manufacturer Part Number: ATMEGA16U4-AU
• Description: MCU AVR 16K FLASH USB 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16U4-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 26
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14.5
7766F–AVR–11/10
Input Capture Unit
The Timer/Counter Overflow Flag (TOVn) is set according to the mode of operation selected by
the WGMn3:0 bits. TOVn can be used for generating a CPU interrupt.
The Timer/Counter incorporates an input capture unit that can capture external events and give
them a time-stamp indicating time of occurrence. The external signal indicating an event, or mul-
tiple events, can be applied via the ICPn pin or alternatively, for the Timer/Counter1 only, via the
Analog Comparator unit. The time-stamps can then be used to calculate frequency, duty-cycle,
and other features of the signal applied. Alternatively the time-stamps can be used for creating a
log of the events.
The Input Capture unit is illustrated by the block diagram shown in
the block diagram that are not directly a part of the input capture unit are gray shaded. The small
“n” in register and bit names indicates the Timer/Counter number.
Figure 14-3. Input Capture Unit Block Diagram
Note:
When a change of the logic level (an event) occurs on the Input Capture Pin (ICPn), alternatively
on the analog Comparator output (ACO), and this change confirms to the setting of the edge
detector, a capture will be triggered. When a capture is triggered, the 16-bit value of the counter
(TCNTn) is written to the Input Capture Register (ICRn). The Input Capture Flag (ICFn) is set at
the same system clock as the TCNTn value is copied into ICRn Register. If enabled (TICIEn =
1), the input capture flag generates an input capture interrupt. The ICFn flag is automatically
cleared when the interrupt is executed. Alternatively the ICFn flag can be cleared by software by
writing a logical one to its I/O bit location.
The Analog Comparator Output (ACO) can only trigger the Timer/Counter1 ICP – not
Timer/Counter3, 4 or 5.
ICPn
WRITE
ICRnH (8-bit)
TEMP (8-bit)
Comparator
Analog
ICRn (16-bit Register)
ACO*
ICRnL (8-bit)
ACIC*
DATA BUS
Canceler
ICNC
Noise
(8-bit)
TCNTnH (8-bit)
TCNTn (16-bit Counter)
ATmega16/32U4
Figure
Detector
ICES
Edge
14-3. The elements of
TCNTnL (8-bit)
ICFn (Int.Req.)
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